Lg Display Co., Ltd.

HwaDong Han

Geondo Park

SoonJae Hwang

DuHwan Oh

Jinwoo Lee

Changhoon Lee

ChongHun Park

Ilgi Jeong

Suwoong Lee

Kyungyun Kang

Jangkyun Chung

Hoeyong Kim

Hyunsoo Jang

JoonMin Park

Taekyun Kim

Yeolhyeong Lee

A display device includes a display panel having a display area and a non-display area and a polyimide substrate. The display device includes a transistor disposed above the substrate in the display area, a flexible film disposed on a side surface of the non-display area and connected to the substrate, and a conductive layer disposed below the substrate and applied with a low potential power voltage from the flexible film to improve an edge burn-in due to the polarization by offsetting positive charges in the polyimide substrate.

Display device that prevents edge burn-in

A display device includes a substrate which includes a display area and a non-display area adjacent to the display area, a first planarization layer which is at least partially disposed in the display area, a second planarization layer which is disposed in the non-display area and is spaced apart from the first planarization layer, a contact unit disposed between the first planarization layer and the second planarization layer in the non-display area, and a cathode which extends from the display area to the non-display area to be electrically connected to the contact unit. Accordingly, the first planarization layer and the second planarization layer are spaced apart from each other so that a path through which moisture permeates into the display area through the second planarization layer may be blocked.

Display device having a contact unit

A display device comprising a display panel that includes an active area, the active area including a data line positioned on a substrate in a first direction and transferring a data signal, a gate line positioned on the substrate in a second direction and transferring a gate signal, a thin film transistor connected to the gate line and the data line, and a plurality of pixels driven by the thin film transistor, a first pad coupled to a first signal line disposed in a data signal area wherein the first signal line is connected to the data line, and a first non-signal line disposed in a first non-signal area wherein the first non-signal line is disconnected from the data line, the first non-signal area being disposed outside the data signal area, a second pad coupled to a second signal line disposed in a gate signal area wherein the second signal line is connected to the gate line, and a second non-signal line disposed in a second non-signal area wherein the second non-signal line is disconnected from the gate line, the second non-signal area being disposed outside the gate signal area; and a dummy pattern disposed between the data signal area and the first non-signal area, or disposed between the gate signal area and the second non-signal area.

Display panel including static electricity preventing pattern and display device having the same

The present invention relates to a display panel including a static electricity preventing pattern and a display device having the same. An aspect of the present invention provides a display device or a display panel in which a dummy pattern having a pattern identical to or similar to a line of a signal area is positioned between the signal area and a non-signal area, in a pad including the signal area and the non-signal area.

A display device including a substrate including a display area and a non-display area, wherein the non-display area comprises a gate metal line positioned on the substrate, a gate insulating layer insulating the gate metal layer, a data metal line positioned on the gate insulating layer, and two or more protective layers positioned in a region in which the gate metal line and the data metal line overlap above the data metal line.

Display device and method for manufacturing the same

A shift register of the present disclosure includes a plurality of stages. Each stage includes transistors belonging to a first group for activating a Q node, transistors belonging to a second group for discharging odd and even QB nodes, transistors belonging to a third group for being activated by the odd and even QB nodes and for discharging the Q node, and a sensing circuit for sensing a threshold voltage of at least one of the transistor belonging to the third group at a period when the Q node is discharged. The shift register of the present disclosure avoids the problem of erroneous operation due to lowering of device characteristics.

Growing community of inventors

Goyang-si, South Korea

HwaDong Han