Intel Corporation

Intel Corproation

Husnara Khan

Robert P Adler

Tracy Garrett Drysdale

Sitaram Yadavalli

Sandhya Seshadri

Hassan M Shehab

Satish Venkatesan

Dhrubajyoti Kalita

Ramamurthy Sunder

Wendy Liu

Hanumanth Bollineni

Mukesh K Mishra

Snehal Kharkar

Bindu Lalitha

Methods and apparatus relating to subsystem-based System on Chip (SoC) integration are described. In one embodiment, logic circuitry determines one or more components of a subsystem. The subsystem supports an architectural feature to be implemented on a System on Chip (SoC) device. A first interface communicatively couples a first component of the subsystem to a first component of another subsystem. A second interface communicatively couples at least one component of the subsystem to at least one chassis component of the SoC device or communicatively couples the at least one component of the subsystem to at least one non-chassis component of the other subsystem. In an embodiment, components of the subsystem may be packaged such that the packaging generates a reusable collateral that allows for fast integration of all aspects of design in any SoC device with a compatible chassis prior to manufacture.

Subsystem-based SoC integration

Various methods, apparatuses, and systems that use a replacement policy algorithm to implement tracking of one or more memory locations that have incurred one or more data transfer failures.

Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locations

Growing community of inventors

Chandler, AZ, United States of America

Husnara Khan