Shanghai Huali Integrated Circuit Corporation

Semiconductor Manufacturing International (shanghai) Corporation

Huojin Tu

Zhanyuan Hu

Jueyang Liu

Qin Deng

The disclosure provides a manufacturing method for a fin field-effect transistor. The method to make the fin field-effect transistor comprises: forming a fin structure and a gate structure spanning on the fin structure on a substrate; and forming a source-drain region on the fin structure, which comprises: forming an epitaxial layer; and forming a sacrificial layer on the surface of the epitaxial layer to prevent the epitaxial layer from being lost in the subsequent removal steps.

Manufacturing method of Fin field-effect transistor

An epitaxial growth process for a semiconductor device includes providing a semiconductor substrate, forming a plurality of Dummy Gate structures on the surface of the semiconductor substrate, and forming grooves in a self-aligned manner on both sides of the Dummy Gate structures; forming an initial seed layer on the inner side surfaces of the grooves, the thickness of the formed initial seed layer on the bottoms of the grooves being greater and the thickness of the formed initial seed layer on the sidewalls being smaller since the growth speed of crystal faces &#x3c;100&#x3e; and &#x3c;110&#x3e; is different; longitudinally etching the initial seed layer to thin the bottom of the initial seed layer to form a seed layer; forming a main body layer on the seed layer, the main body layer filling the grooves; and forming a cover layer on the main body layer.

Epitaxial growth process for semiconductor device and semiconductor device comprising epitaxial layer formed by adopting the same

The present disclosure provides a method for forming a semiconductor device. The method includes providing a semiconductor substrate; forming a gate structure on the semiconductor substrate; and forming trenches in the semiconductor substrate on both sides of the gate structure. The method also includes forming a stress layer on inner sidewalls of each trench to fill up the trench; forming an interlayer on the stress layer, and forming a capping layer on the interlayer, wherein a top surface of the capping layer is higher than a top surface of the semiconductor substrate, and a lattice mismatch between the interlayer and the capping layer is lower than a lattice mismatch between the capping layer and the stress layer.

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Shanghai, China

Huojin Tu