Marvell International Limited

Hunghsin Kuo

Zhenyu Zhang

Victor Lin

Jing Jiang

Sheng Lu

Lawrence Tse

Brian Bosso

Chuong Vu

James Chen

An active network system for a host device with a host processor, comprises a wireless port including a first physical layer/medium access control (PHY/MAC) device. A first wired port includes a second PHY/MAC device. A secondary processor communicates with the wireless port, the first wired port and the host processor. The secondary processor, the wireless port and the first wired port support network functionality when the host processor is an inactive mode. The network functionality includes at least one of access point functionality, router functionality, repeater functionality, point-to-point functionality and point-to-multipoint functionality.

Active network system for wireless computer networks

A method includes receiving samples of audio data and storing the samples of audio data in a buffer. Each of the samples of audio data includes a plurality of bits. The method also includes transmitting each of the plurality of bits, of each of the samples of audio data retrieved from the buffer, across a single-bit bus; and subsequent to transmitting each of the samples, transmitting a selected number of dummy bits across the single-bit bus. The selected number is greater than one. The method further includes analyzing activity of the buffer and, based on the activity of the buffer, dynamically adjusting the selected number. The method also includes acquiring the samples of audio data transmitted across the single-bit bus and ignoring the dummy bits. The method further includes generating analog signals in response to the samples of audio data acquired across the single-bit bus.

Buffered audio system with synchronizing bus controller

An audio system includes an audio client device and an access point. The audio client device includes a buffer, a clock generator, a bus controller, a bus receiver, and a control module. The buffer is configured to receive a stream of samples of audio data. The clock generator is configured to generate a first clock signal. The bus controller is configured to read samples from the buffer for transmission across a bus using the first clock signal. The bus receiver is configured to receive samples from the bus controller and output a sampling clock along with each sample. The control module is configured to analyze activity of the buffer and modify operation of the bus controller to synchronize the sampling clock with a remote sampling clock. The access point includes an audio content module, a decoding module, and a network interface that wirelessly transmits the stream of samples.

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Hunghsin Kuo