United Microelectronics Corp.

Hung-Yuan Lu

Teng-Chun Tsai

Wen-Chin Lin

Jen-Chieh Lin

Hsin-Kuo Hsu

Ya-Hsueh Hsieh

Ren-Peng Huang

Chih-Hsien Chen

Wei-Che Tsao

Chih-Chin Yang

A planarization method of manufacturing a semiconductor component is provided. A dielectric layer is formed above a substrate and defines a trench therein. A barrier layer and a metal layer are formed in sequence in the trench. A first planarization process is applied to the metal layer by using a first reactant so that a portion of the metal layer is removed. An etching rate of the first reactant to the metal layer is greater than that of the first reactant to the barrier layer. A second planarization process is applied to the barrier layer and the metal layer by using a second reactant so that a portion of the barrier layer and the metal layer are removed to expose the dielectric layer. An etching rate of the second reactant to the barrier layer is greater than that of the second reactant to the metal layer.

Planarization method applied in process of manufacturing semiconductor component

Growing community of inventors

Kaohsiung, Taiwan

Hung-Yuan Lu