Broadcom Corporation

Hung Yu Yang

Jesus Alfonso Castaneda

Iqbal Bhatti

Reza Rofougaran

Jesse A Castaneda

Razieh Rogougaran

Razieh Roufoogaran

Lijun Zhang

An integrated RF front-end architecture is disclosed. Such an integrated RF front-end architecture includes a multi-tap balun, a low noise amplifier and a power amplifier core. The multi-tap balun includes a single-ended primary winding and a symmetrical multi-tap secondary winding, wherein the single-ended primary winding is operably coupled to an antenna. The low noise amplifier is coupled to a first set of taps of the symmetrical multi-tap secondary winding. The power amplifier core is coupled to a second set of taps of the symmetrical multi-tap secondary winding and can be a two stage amplifier having a driver stage and an output stage. The multi-tap balun, low noise amplifier and power amplifier core can be on-chip components or can be fabricated to be discrete components on a printed circuit board.

Integrated circuit radio front-end architecture and applications thereof

An on-chip multiple tap transformer balun includes a 1winding and a 2winding having two portions. The 1winding is on a 1layer of an integrated circuit and is operably coupled for a single ended signal. The 1and 2portions of the 2winding are on a 2layer of the integrated circuit. The 1portion of the 2winding includes a 1node, a 2node, and a tap. The 1node is operably coupled to receive a 1leg of a 1differential signal and the 2node is coupled to a reference potential. The tap of the 1portion is operably coupled for a 1leg of a 2differential signal. The 2portion of the 2winding includes a 1node, 2node, and tap. The 1node is operably coupled to receive a 2leg of the 1differential signal and the 2node is operably coupled to the reference potential. The tap of the 2portion is coupled for a 2leg of the 2differential signal. The 1and 2portions of the 2winding are symmetrical with respect to the 1and 2nodes and with respect to the tap nodes.

On-chip multiple tap transformer and inductor

An on-chip differential inductor includes a 1interwound winding having a substantially octagonal shape, or rectangular octagonal shape, and a 2interwound winding having a substantially octagonal shape, or rectangular octagonal shape, that is interwound with the 1interwound winding. Both the 1and 2interwound windings are on the same layer of the integrated circuit. Each interwound winding includes two nodes; one of node of each winding is commonly coupled to a reference potential. The other node of each winding is operably coupled to receive a respective leg of a differential signal.

On-chip differential inductor and applications thereof

A transformer balun is obtained that is symmetrical in structure, provides high current, or high voltage, amplification and has high coupling coefficients while maintaining minimal overall size. The balun structure includes primary and secondary metal windings at separate layer interfaces. The primary and secondary metal windings are symmetrical and can have any number of turns, which is only limited by integrated circuit area and capacitance. Accordingly, the, primary and secondary windings may be on as many layers as needed. Further, the primary and/or secondary may include a center tap ground, which enables the winding to be used as a differential port.

On-chip transformer balun

A transformer balun is obtained that is symmetrical in structure, provides high current, or high voltage, amplification and has high coupling coefficients while maintaining minimal overall size. The balun structure includes primary and secondary metal windings at separate layer interfaces. The primary and secondary metal windings are symmetrical and can have any number of turns, which is only limited by integrated circuit area and capacitance. Accordingly, the primary and secondary windings may be on as many layers as needed. Further, the primary and/or secondary may include a center tap ground, which enables the winding to be used as a differential port.

Integrated radio having on-chip transformer balun

An on-chip multiple tap transformed balun includes a 1 winding and a 2 winding having two portions. The 1 winding is on a 1 layer of an integrated circuit and is operably coupled for a single ended signal. The 1 and 2 portions of the 2 winding are on a 2 layer of the integrated circuit. The 1 portion of the 2 winding includes a 1 node, a 2 node, and a tap. The 1 node is operably coupled to receive a 1 leg of a 1 differential signal and the 2 node is coupled to a reference potential. The tap of the 1 portion is operably coupled for a 1 leg of a 2 differential signal. The 2 portion of the 2 winding includes a 1 node, 2 node, and tap. The 1 node is operably coupled to receive a 2 leg of the 1 differential signal and the 2 node is operably coupled to the reference potential. The tap of the 2 portion is coupled for a 2 leg of the 2 differential signal. The 1 and 2 portions of the 2 winding are symmetrical with respect to the 1 and 2 nodes and with respect to the tap nodes.

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Los Angeles, CA, United States of America

Hung Yu Yang