Taiwan Semiconductor Manufacturing Comp. Ltd.

TSMC Solid State Lighting Ltd.

Via Technologies, Inc.

Epistar Corporation

Auras Technology Co., Ltd.

Hung-Yi Kuo

Hao-Yi Tsai

Chen-Hua Douglas Yu

Tsung-Yuan Yu

Chung-Shi Liu

Cheng-Chieh Hsieh

Ming Hung Tseng

Chung-Ming Weng

Hsien-Wei Chen

Chih-Kuang Yu

Yu-Chia Lai

Tzu-Sung Huang

Chuei-Tang Wang

Hua-Kuei Lin

Jie Chen

Ming-Hung Tseng

Hsing-Kuo Hsia

Che-Hsiang Hsu

Mirng-Ji Lii

Shih-Wei Liang

Chyi Shyuan Chern

Hsien-Ming Tu

Tin-Hao Kuo

Ying-Ju Chen

Yen-Liang Lin

Wei-Ting Chen

Chewn-Pu Jou

Chao-Wen Shih

Kuo Lung Pan

Vincent Chen

Chang-Pin Huang

Hsiu-Jen Lin

Chieh-Yen Chen

Shu-Rong Chun

Cheng-Tse Tang

Tung-Liang Shao

Po-Yuan Teng

Tzu-Chun Tang

Hsin-Hsien Wu

Nien-Fang Wu

Hui-Jung Tsai

Feng-Wei Kuo

Min-Chien Hsiao

Chun-Ti Lu

Chia-Hung Su

Chiang-Jui Chu

Yu-Hsiang Hu

Fu-Chih Yang

Ching-Jung Yang

Chih-Hsuan Tai

Chih-Horng Chang

Hung-Chao Kao

Mao-Yen Chang

Teng-Yuan Lo

Ken Wen-Chien Fu

Pi-Lan Chang

Ren-Xuan Liu

Ming-Feng Wu

Shouli Steve Hsia

Hui-Mei Chen

Shang-Yun Hou

Jiun Yi Wu

Ming-Che Ho

Jiin Lai

Kuo-Chiang Ting

Chun-Lin Louis Chang

Tsung-Hsien Chiang

Shih-Wei Chen

Min-Hsiang Hsu

Kuo-Lung Pan

Yu-Hao Chen

Ching-Hua Chiu

Ruei-Ling Lin

Wei-Kang Hsieh

Ting Hao Kuo

Wen-Chien Fu

Kuo-Chung Yee

Chih-Hua Chen

Yu-Feng Chen

Jui-Feng Kuan

Hui Yu Lee

Chia-Chun Miao

Mu-Shu Fan

Chien-Te Wu

I-Ming Lin

Hung-Wen Huang

In-Tsang Lin

Weber Chuang

Jenny Chen

An-Chih Wu

Hsin-Chang Chen

Wei Kang Hsieh

Ming-Chieh Li

Tsung-Hsin Lin

Chyi Shyuan Chem

A photonic integrated circuit has a central region and a peripheral region surrounding the central region. The photonic integrated circuit includes a semiconductor layer, a seal ring structure, and a plurality of silicon waveguides. The seal ring structure is disposed on the semiconductor layer. The seal ring structure is located in the peripheral region and has at least one recess recessing towards the central region from a top view. The seal ring structure is a continuous structure from the top view. The silicon waveguides are embedded in the semiconductor layer.

Photonic integrated circuit and package structure

A package includes silicon waveguides on a first side of an oxide layer; photonic devices on the first side of the oxide layer, wherein the photonic devices are coupled to the silicon waveguides; redistribution structures over the first side of the oxide layer, wherein the redistribution structures are electrically connected to the photonic devices; a hybrid interconnect structure on a second side of the oxide layer, wherein the hybrid interconnect structure includes a stack of silicon nitride waveguides that are separated by dielectric layers; and through vias extending through the hybrid interconnect structure and the oxide layer, wherein the through vias make physical and electrical connection to the redistribution structures.

Photonic package and method of manufacture

A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion. The first insulating encapsulation laterally encapsulates the second semiconductor die, the first conductive pillars and the second portion.

Method of fabricating semiconductor structure

A semiconductor device includes an optical connector element and an optical coupler. The optical connector element includes a base structure, a first polymer via and a cladding layer. The base structure has a first surface and a second surface opposite to the first surface. The first polymer via passes through the base structure from the first surface to the second surface. The cladding layer is surrounding the first polymer via, wherein a refractive index of the cladding layer is different than a refractive index of the first polymer via. The optical coupler is disposed over the optical connector element, wherein the optical coupler receives optical signals from the first polymer via.

Package structure, semiconductor device and method of fabricating the same

A method of making a semiconductor device, includes: forming a first molding layer on a substrate; forming a first plurality of vias in the first molding layer; forming a first conductive line over the first molding layer, wherein the first conductive line is laterally disposed over the first molding layer and a first end of the conductive line aligns with and is electrically coupled to a first via of the first plurality of vias; forming a second molding layer above the first molding layer; and forming a second plurality of vias in the second molding layer, wherein a second via of the second plurality of vias aligns with and is electrically coupled to a second end of the conductive line, and wherein the second plurality of vias, the conductive line, and the first plurality of vias are electrically coupled to one another.

Dual-mode wireless charging device

A semiconductor package and a manufacturing method thereof is provided. The semiconductor package includes a first semiconductor die, including a substrate and transistors formed at a front side of the substrate; a power distribution network, spreading at a back side of the substrate and penetrating through the substrate, to provide power and ground signals to the transistors; a dielectric material, laterally surrounding the first semiconductor die; and a second semiconductor die, having a central portion bonded with the first semiconductor die and a peripheral portion in contact with the dielectric material.

Semiconductor package and manufacturing method thereof

A semiconductor device includes a first chip package, a heat dissipation structure and an adapter. The first chip package includes a semiconductor die laterally encapsulated by an insulating encapsulant, the semiconductor die has an active surface and a back surface opposite to the active surface. The heat dissipation structure is connected to the chip package. The adapter is disposed over the first chip package and electrically connected to the semiconductor die.

Semiconductor device having a heat dissipation structure connected chip package

A system and method for providing and programming a programmable inductor is provided. The structure of the programmable inductor includes multiple turns, with programmable interconnects incorporated at various points around the turns to provide a desired isolation of the turns during programming. In an embodiment the programming may be controlled using the size of the vias, the number of vias, or the shapes of the interconnects.

Programmable inductor and methods of manufacture

An integrated circuit package and a method of forming the same are provided. The integrated circuit package includes a photonic integrated circuit die. The photonic integrated circuit die includes an optical coupler. The integrated circuit package further includes an encapsulant encapsulating the photonic integrated circuit die, a first redistribution structure over the photonic integrated circuit die and the encapsulant, and an opening extending through the first redistribution structure and exposing the optical coupler.

Package and method of forming same

A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Photonic semiconductor device and method of manufacture

A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die. The at least one reflector is disposed on the at least one prism structure.

A manufacturing method of a semiconductor package includes the following steps. A supporting layer is formed over a redistribution structure. A first planarization process is performed over the supporting layer. A lower dielectric layer is formed over the supporting layer, wherein the lower dielectric layer includes a concave exposing a device mounting region of the supporting layer. A first sacrificial layer is formed over the supporting layer, wherein the sacrificial layer filling the concave. A second planarization process is performed over the lower dielectric layer and the first sacrificial layer. A transition waveguide provided over the lower dielectric layer. The first sacrificial layer is removed. A semiconductor device is mounted over the device mounting region, wherein the semiconductor device includes a device waveguide is optically coupled to the transition waveguide.

Manufacturing method of semiconductor package

A package includes an electronic die, a photonic die underlying and electronically communicating with the electronic die, a lens disposed on the electronic die, and a prism structure disposed on the lens and optically coupled to the photonic die. The prism structure includes first and second polymer layers, the first polymer layer includes a first curved surface concaving toward the photonic die, the second polymer layer embedded in the first polymer layer includes a second curved surface substantially conforming to the first curved surface, and an outer sidewall of the second polymer layer substantially aligned with an outer sidewall of the first polymer layer.

Package having prism structure and manufacturing method thereof

A semiconductor package includes a lower semiconductor device, a plurality of conductive pillars, an upper semiconductor device, an encapsulating material, and a redistribution structure. The plurality of conductive pillars are disposed on the lower semiconductor device along a direction parallel to a side of the lower semiconductor device. The upper semiconductor device is disposed on the lower semiconductor device and reveals a portion of the lower semiconductor device where the plurality of conductive pillars are disposed, wherein the plurality of conductive pillars disposed by the same side of the upper semiconductor device and the upper semiconductor device comprises a cantilever part cantilevered over the at least one lower semiconductor device. The encapsulating material encapsulates the lower semiconductor device, the plurality of conductive pillars, and the upper semiconductor device. The redistribution structure is disposed over the upper semiconductor device and the encapsulating material.

Semiconductor package and manufacturing method of semiconductor package

Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.

Semiconductor package

Growing community of inventors

Taipei, Taiwan

Hung-Yi Kuo