Broadcom Corporation

Maxlinear Asia Singapore Pte Ltd

Avago Technologies International Sales Pte. Limited

Hung-Ming Chien

Meng-An Pan

Ahmadreza Rofougaran

Maryam Rofougaran

Brima Babatunde Ibrahim

Stephen Wu

Jacob Jude Rael

Arya Behzad

Masood Syed

Shahla Khorram

Shervin Moloudi

William T Colleran

Yuyu Chang

Dandan Li

Tsung-Hsien Lin

Adedayo Ojo

Kishore Rama Rao

Syed Masood

Guruprasad Seetharam

Seunghwan Yoon

Tirdad Sowlati

Qiang Li

Razieh Roufoogaran

Igal Kushnir

Kobi Sturkovich

Wei-Hong Chen

Chin-Ming Chien

Shaul Klein

Moche Cohen

Theodoros Chalvatzis

Keith Andrews Carter

Long Bu

Stephen C Au

Choong Yul Cha

Jacob Rael

A synchronous switching regulator circuit for supply regulation of a switching circuit includes a pass transistor to couple the switching circuit to a supply voltage. The synchronous switching regulator circuit further includes a switch that is operable to synchronously turn off a flow of a supply current through the pass transistor. The switching circuit can be controlled by a switching signal, and the switch can operate in synchronization with the switching circuit.

Synchronous switching regulator circuit

A stacked synthesizer for wide local oscillator (LO) generation using a dynamic divider. The phase locked loop can include a plurality of voltage controlled oscillators (VCOs), and a selector that can be configured to select an output of one of the plurality of VCOs. The selected output of one of the plurality of VCOs can be provided to an on-chip dynamic divider and to an off-chip dynamic divider for LO sharing. The dynamic dividers can be configured to generate synthesizer outputs based on a multiplication of the selected output of one of the plurality of VCOs by a factor (1+1/M), where M is a variable number.

Stacked synthesizer for wide local oscillator generation using a dynamic divider

A transmitter capable of operating according to a first standard that does not interfere with a nearby frequency generator operating according to a second standard. The transmitter comprises an oscillator, a frequency divider, a mixer, and a filter. The oscillator is configured to output a first frequency that is outside of a frequency harmonic of the frequency generator. The frequency divider is coupled to the oscillator and divides the first frequency by a selective divide ratio to produce a second frequency. The mixer is configured to receive the first and second frequencies, which combines them to produce a mixed frequency. The filter is then used to filters the mixed frequency to obtain the higher portion of the mixed frequency. The divide ratio of the frequency divider is selected base on the desired output frequency of the transmitter such that a 2.4 GHz or 5 GHz ISM band frequency is achieved.

Apparatus and method for generating RF without harmonic interference

A phase locked loop (PLL) includes a detector, a charge pump, a loop filter, a voltage controlled oscillator (VCO), a divider, and a frequency change module. The detector provides a phase difference based on a reference signal and a feedback signal. The charge pump provides a charge based on the phase difference. The loop filter provides a voltage based on the charge. The VCO provides an output signal based on the voltage received from the loop filter. The divider divides a frequency of the output signal by a value to provide the feedback signal. The frequency change module processes an input signal having a first frequency to provide a processed signal having a second frequency that is different from the first frequency. The frequency change module selects the input signal or the processed signal to provide as the reference signal to the detector. Changing the frequency of the reference signal can change a frequency of a spur.

Phase locked loop including a frequency change module

Aspects of a method and system for processing signals in a high performance receive chain may include amplifying a plurality of radio frequency signals in one or more respective one or ones of a plurality of amplifier chains in a multistandard radio frequency front-end, which may comprise one or more shared processing stages. The plurality of radio frequency signals may be compliant with a plurality of radio frequency communication standards and may be received concurrently. The one or more shared processing stages may be shared between two or more of the plurality of amplifier chains. Each of the two or more of the plurality of amplifier chains may be operable to amplify signals compliant with different radio frequency communication standards.

Method and system for processing signals in a high performance receive chain

Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network.

Method and system for mitigating the effects of pulling in multiple phase locked loops in multi-standard systems

An RF receiver and an RF transmitter, which are integrated in a single substrate, are operable to share a single reconfigurable filter to perform RF receiver filtering and RF transmitter filtering. The reconfigurable filter is configured to operate as a bandpass filter such as an image rejection bandpass filter for receiving RF signals by the RF receiver. The reconfigurable filter operates as a low pass filter for transmitting RF signals by the RF transmitter. The reconfigurable filter is configured to operate in a RF receiver filtering mode or a RF transmitter filtering mode, respectively. The reconfigurable filter is enabled to share configurable circuit components of the radio transceiver in both the radio frequency receiver filtering mode and the radio frequency transmitter filtering mode. The reconfigurable filter transitions between the radio frequency receiver filtering mode and the radio frequency transmitter filtering mode via reconfiguring the shared configurable circuit components.

Method and system for a reconfigurable filter that is utilized by a RF transmitter and a RF receiver which are integrated on a single substrate

An alternate adjacent channel interference (AACI) filter is integrated into an intermediate frequency (IF) channel select filter to filter received RF signals. The IF channel select filter is an IF staged structure comprising successive IF stages. Each of the successive IF stages is a 2-biquad integrator. The AACI filter is integrated into the first IF stage of the IF channel select filter by re-using circuit components such as an operational amplifier, an input resistor, and a shunt capacitor of the first IF stage. The shunt capacitor is coupled between a middle point of the input resistor and ground. The AACI filter is realized via different equivalent implementations of the re-used circuit components of the first IF stage. A value of the shunt capacitor of the AACI filter becomes a fixed-value when a value the input resistor is inversely proportional to the bandwidth of the AACI filter.

Method and system for an intermediate frequency (IF) channel select filter with an integrated alternate adjacent channel interference (AACI) filter

An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Adaptive radio transceiver

A semiconductor device exhibiting low parasitic resistance comprises a first substrate characterized by a first resistivity; a second substrate characterized by a second resistivity, a third substrate and a metal element. These substrates form a multi-layer semiconductor device where the second substrate is formed on the first substrate; the third substrate is formed on the second substrate; and the metal element is formed on the third substrate. The second substrate is electrically grounded and is highly doped with acceptor dopant as compared to the first substrate. In this way, the second resistivity is lower than the first resistivity.

Apparatus for reducing parasitic capacitance in a semiconductor device

Adaptive radio transceiver with offset PLL with subsampling mixers

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Irvine, CA, United States of America

Hung-Ming Chien