United Microelectronics Corp.

Hung-Ling Shih

Shao-Hua Hsu

Chien-Ting Lin

Shin-Chi Chen

Po-Jui Liao

Guang-Yaw Hwang

Tsung-Lung Tsai

Chun-Hsien Lin

Chan-Lon Yang

Jiunn-Hsiung Liao

Che-Hua Hsu

Zhi-Cheng Lee

Chia-Wen Liang

Cheng-Guo Chen

Yeng-Peng Wang

Yi-Wen Chen

Jie-Ning Yang

Jung-Tsung Tseng

Teng-Chun Tsai

Yi-Wei Chen

Chun-Yuan Wu

Chia-Lin Hsu

Chieh-Te Chen

Hsin-Fu Huang

Wen-Han Hung

Chien-Ming Lai

Wei-Hang Huang

Min-Chuan Tsai

Po-Cheng Huang

Tong-Jyun Huang

Ying-Tsung Chen

Tzung-Ying Lee

Hung-Yi Wu

Cheng-Yu Ma

Heng-Ching Huang

A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An Oambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.

Oxygen treatment of replacement work-function metals in CMOS transistor gates

A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary.

Semiconductor device having metal gate and manufacturing method thereof

A semiconductor device having a metal gate includes a substrate having a first gate trench and a second gate trench formed thereon, a gate dielectric layer respectively formed in the first gate trench and the second gate trench, a first work function metal layer formed on the gate dielectric layer in the first gate trench and the second gate trench, a second work function metal layer respectively formed in the first gate trench and the second gate trench, and a filling metal layer formed on the second work function metal layer. An opening width of the second gate trench is larger than an opening width of the first gate trench. An upper area of the second work function metal layer in the first gate trench is wider than a lower area of the second work function metal layer in the first gate trench.

The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.

Method of manufacturing semiconductor device having metal gates

A method for forming a semiconductor device. A substrate having thereon at least one small pattern and at least one large pattern is provided. A sacrificial layer is deposited to cover the small pattern and the large pattern. A chemical mechanical polishing is performed to planarize the sacrificial layer. The sacrificial layer is then dry etched to a thickness that is smaller than a height of the small pattern and the large pattern, thereby revealing an oxide hard mask of the small pattern and the large pattern. The oxide hard mask is then selectively removed.

Method for fabricating a semiconductor device

A removing method of a hard mask includes the following steps. A substrate is provided. At least two MOSFETs are formed on the substrate. An isolating structure is formed in the substrate and located between the at least two MOSFETs. Each of the MOSEFTs includes a gate insulating layer, a gate, a spacer and a hard mask on the gate. A protecting structure is formed on the isolating structure and the hard mask is exposed from the protecting structure. The exposed hard mask is removed to expose the gate.

Removing method of a hard mask

Growing community of inventors

Chiayi County, Taiwan

Hung-Ling Shih