Silicon Motion, Inc.

Hung-Jen Huang

Shiuan-Hao Kuo

A method and apparatus for decoding a Low-Density Parity-Check (LDPC) code whereby the apparatus comprises an LDPC decoder comprising variable-node calculation circuitry and check-node calculation circuitry: the check-node calculation circuitry is arranged operably to perform a modulo 2 multiplication on a codeword and a parity check matrix to calculate a plurality of first syndromes in a first-stage state. The variable-node calculation circuitry is arranged operably to perform a bit flipping algorithm to generate variable nodes, and calculate soft bits for the variable nodes in a second-stage state. The check-node calculation circuitry is arranged to perform the modulo 2 multiplication on the variable nodes and the parity check matrix to calculate second syndromes in the second-stage. When second syndromes indicate that the previously generated variable nodes are incorrect, a third stage state is repeated until decoding succeeds or a total number of iterations exceeds a threshold.

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Taichung, Taiwan

Hung-Jen Huang