Industrial Technology Research Institute

Macronix International Co., Ltd.

Ememory Technology Inc.

Hung-Hsiang Wang

Ming-Jer Kao

Jeng-Hua Wei

Ming-Jiunn Lai

Hsin-Hui Chen

Po-Yuan Lo

Yung-Lan Tseng

Wei-Chen Chen

Tsung-Mu Lai

Chih-Hsin Chen

Cheng-Te Yang

Hsin-An Hou

Shi-Yang Chen

Jih-Shun Chiang

Chien-Liang Hwang

Andy Lin

Hsin-chen Liu

Pan-kai Liu

Shuenn-chuan Yu

A random bit cell includes a latch and a nonvolatile memory cell. The nonvolatile memory cell includes a storage circuit, a control element, an erase element, and a read circuit. The storage circuit is coupled to a first terminal of the latch. The storage circuit includes a floating gate transistor having a first terminal, a second terminal, and a floating gate. The control element has a first terminal coupled to a control line, and a control terminal coupled to the floating gate of the floating gate transistor. The erase element has a first terminal coupled to an erase line, and a control terminal coupled to the floating gate of the floating gate transistor. The read circuit is coupled to a bit line, a select gate line, and the floating gate of the floating gate transistor.

Random bit cell with nonvolatile memory cell

The disclosure is directed to a method of controlling a heterogeneous network and related apparatuses using the same method. In one of the exemplary embodiments, the disclosure is directed to a method controlling a heterogeneous network applicable to a base station, the method includes not limited to: transmitting a first configuration message comprising a measurement and report rule (MRR) which comprises a first measuring interval, a second measuring interval, a first reporting interval, and a second reporting interval for receiving a measurement report of a channel of an unlicensed spectrum; receiving the measurement report of the channel of the unlicensed spectrum after transmitting the first configuration message; and transmitting a second configuration message to update the MRR.

Method of controlling heterogeneous network and related apparatuses using the same

A method for controlling a distributed antenna system includes the following steps. A target propagation delay value is defined according to a transmit/receive transition gap. Propagation delay time of a service antenna unit corresponding to a base station is estimated. The service antenna unit is turned on to perform downlink signal transmission, and the propagation delay time of the service antenna unit is compensated to the target propagation delay value.

Method, apparatus and system for controlling distributed antenna system

A symbol timing method for a multi-carrier system is provided, including: receiving an input symbol; executing a correlation operation by using a first summation window with a size smaller than a duplicated data to generate a first characteristic signal; determining a first search region according to a first predetermined threshold and the first characteristic signal and searching a local peak value in the first search region; locating a right edge point of the first characteristic signal according to a difference value and the local peak value; obtaining a coarse symbol timing position for a following input symbol according to a predetermined movement and the right edge point; and outputting the coarse symbol timing position to a signal transformation module, wherein signal transformation is executed by the signal transformation module according to the coarse symbol timing position.

Symbol timing methods and apparatuses using the same in multi-carrier receiving systems

A system and method corrects erroneous sections received in a memory by pre-filling at least a portion of memory with a pre-defined value. If a received data packet is valid, the valid received data packet is stored over the pre-defined values in the memory location associated with the valid data packet. Values associated with a data segment and an adjacent data segment in the memory are compared to the pre-defined value. When the values of each data segment match the pre-defined values, then each data segment is an erroneous data segment.

Method and apparatus for mitigating memory requirements of erasure decoding processing

A guard interval length detector is introduced. The guard interval length detector includes a delay conjugate multiplier capable of delaying a plurality of input signals to provide delayed input signals and multiplying each of the plurality of input signals with a complex conjugate of a corresponding one of the delayed input signals to provide multiplied signals, a phase detector capable of determining phase values corresponding to the multiplied signals, and a period detector capable of detecting a period according to the phase values, and determining a guard interval length of the input signals according to the period.

Method and related circuit of guard interval length detection for OFDM signals

An apparatus and method for guard interval detection in a multi-carrier receiver has been disclosed. According to the present invention, the apparatus and method are employed for determining a guard interval length of an input signal to be one of a plurality of available guard interval lengths. The apparatus of the present invention includes an auto-correlator, a power density calculator and a maximum detector. The auto-correlator is used to generate a correlation result in response to the input signal, and the power density calculator is used to generate a plurality of power density results in response the correlation result and the available guard interval lengths. The maximum detector is employed to generate a determination result in response to the maximum value of the plurality of power density results.

Method and apparatus for guard interval detection in multi-carrier receiver

A metal nanoline process and applications on growth of aligned nanostructures thereof. A nano-structure is provided with a substrate with at least one nanodimensional metal catalyst line disposed thereon and at least one carbon nanotube or silicon nanowire extending along an end of the metal catalyst line.

Metal nanoline process and applications on growth of aligned nanostructure thereof

A synchronization apparatus and method for an OFDM system includes four portions: delay conjugate multiplication, phase processing, delay moving sum and minimum value detection. The invention performs the correlation phase operation and finds out the location of abnormal change for the phase difference of the output signal. The location is used for the reference of symbol synchronization. It overcomes the problems of incorrect judge about synchronization location due to the channel fading or noise. The invention can be applied to wire/wireless communications or digital video broadcasting-terrestrial systems, specialized in symbol synchronization at a receiving end.

Synchronization method and apparatus for OFDM systems

The present invention relates to a structure and manufacturing process of a nano device transistor for a biosensor. The structure, the manufacturing process and the related circuit for a carbon nano tube or nano wire transistor biosensor device are provided. The refurbished nano device is used for absorbing various anti-bodies so as to detect the specific antigens or absorbing various biotins. Therefore, the object of the present invention to detect the specific species for bio measurement can be achieved.

Structure and manufacturing process of a nano device transistor for a biosensor

A method for fabricating an n-type carbon nanotube device, characterized in that thermal annealing and plasma-enhanced chemical vapor-phased deposition (PECVD) are employed to form a non-oxide gate layer on a carbon nanotube device. Moreover, the inherently p-type carbon nanotube can be used to fabricate an n-type carbon nanotube device with reliable device characteristics and high manufacturing compatibility.

Method for fabricating n-type carbon nanotube device

The present invention generally relates to an apparatus and method of carbon nanotube (CNT) gate field effect transistor (FET), which is used to replace the current metal gate of transistor for decreasing the gate width greatly. The carbon nanotube has its own intrinsic characters of metal and semiconductor, so it can be the channel, connector or next-level gate of transistor. Furthermore, the transistor has the structure of exchangeable source and drain, and can be defined the specificity by outside wiring.

Apparatus and manufacturing process of carbon nanotube gate field effect transistor

Carbon nanotube gate field effect transistor

A manufacturing method of carbon nanotube transistors is disclosed. The steps include: forming an insulating layer on a substrate; forming a first oxide layer on the insulating layer using a solution with cobalt ion catalyst by spin-on-glass (SOG); forming a second oxide layer on the first oxide layer using a solution without the catalyst; forming a blind hole on the second oxide layer using photolithographic and etching processes, the blind hole exposing the first oxide layer, the sidewall of the second oxide layer, and the insulating layer; forming a single wall carbon nanotube (SWNT) connecting the first oxide layer separated by the blind hole and parallel to the substrate; and forming a source and a drain connecting to both ends of the SWNT, respectively.

Manufacturing method of carbon nanotube transistors

A semiconductor process recording apparatus comprises a buffer circuit and a endpoint recording device. The input terminal of the buffer circuit is connected to an external endpoint apparatus for receiving a first signal output from the endpoint apparatus. The output terminal of the buffer circuit is connected to the endpoint recording device for outputting a second signal representative of the first signal in response to the first signal. When receiving the second signal, the endpoint recording device outputs a feedback signal to the buffer circuit on the basis of the second signal. Because the feedback signal is blocked by the buffer circuit, the external endpoint apparatus is protected from the damage caused by the feedback signal, thereby greatly reducing the production cost and rate of semiconductor manufacturing.

Growing community of inventors

Taipei, Taiwan

Hung-Hsiang Wang