Mediatek Corporation

Hung-Chieh Tsai

Yu-Hsin Lin

Chen-Yen Ho

Chi-Lun Lo

Sheng-Jui Huang

Jong-Woei Chen

Tze-Chien Wang

Sheng-Hui Liao

The present invention provides a reference voltage buffer comprises a reference voltage generator, a first operational amplifier, a first transistor, a first group of resistors, a first load, a second transistor, a second group of resistors and a second load. In the reference voltage buffer, the first load and the second load use active device to increase the settling time, and the first load, the second load and the reference voltage generator of the reference voltage buffer are resigned to have the same characteristics in response to the temperature variation to overcome the PVT issue, and the first load and the second load of the reference voltage buffer use the open-loop design to have large full-scale of the output reference voltages.

Reference voltage buffer with settling enhancement

A variable gain amplifier includes an input transistor, an auxiliary transistor, an active inductor and an input current replica circuit. The input transistor is arranged for receiving an input signal to generate an output signal at an output terminal. The auxiliary transistor is coupled to the output terminal of the input transistor, wherein a current of the output terminal flows into the input transistor and the auxiliary transistor. The active inductor is coupled to the output terminal of the input transistor. The input current replica circuit is coupled to the output terminal of the input transistor, wherein a current flowing through a portion of the input current replica circuit is equal to the current flowing through the input transistor, and both a current of the active inductor and the current of the portion of the input current replica circuit flow into the output terminal of the input transistor.

Wide bandwidth variable gain amplifier and exponential function generator

An amplifier includes an amplifying stage, a cascoded circuit, an input feed-forward circuit and an output stage. The amplifying stage is arranged receiving a differential input pair to generate an amplified differential input pair. The input feed-forward circuit is coupled to the cascoded circuit, and is arranged for feeding the differential input pair forward to the cascoded circuit. The output stage is coupled to the amplifying stage and the cascoded circuit, and is arranged for generating a differential output pair according to the amplified differential input pair and an output of the cascoded circuit.

Input feed-forward technique for class AB amplifier

A delta-sigma modulator includes a receiving circuit, a loop filter, a quantizer with a negative capacitor circuit and a feedback circuit. The receiving circuit is arranged for receiving an input signal and a feedback signal to generate a first signal. The loop filter is coupled to the receiving circuit, and is arranged for receiving the first signal to generate a filtered signal. The quantizer is coupled to the loop filter, and is arranged for generating a digital output signal according to the filtered signal, wherein the negative capacitor circuit is arranged at an input terminal of the quantizer. The feedback circuit is arranged for receiving the digital output signal to generate the feedback signal.

Delta-sigma modulator and method for enhancing stability of delta-sigma modulator

A circuit includes a first amplifying stage, a noise extraction circuit and a noise cancellation circuit. The first amplifying stage is arranged for receiving an input signal to generate an amplified input signal. The noise extraction circuit is coupled to the first amplifying stage, and is arranged for receiving at least the amplified input signal to generate a noise signal associated with noise components of the amplified input signal. The noise cancellation circuit is coupled to the first amplifying stage and the noise extraction circuit, and is arranged for cancelling noise components of the amplified input signal by using the noise signal generated by the noise extraction circuit, to generate a noise-cancelled amplified input signal.

Feed-forward operational amplifier noise cancellation technique and associated filter and delta-sigma modulator

A circuit includes a transistor, a signal generating circuit and a noise sensing circuit. The signal generating circuit is arranged to provide an input signal. The noise sensing circuit is coupled to the transistor and the signal generating circuit, and the noise sensing circuit is arranged for receiving the input signal provided by the signal generating circuit to generate an output signal to the transistor, wherein a signal component of the output signal generated by the noise sensing circuit cancels out a signal component of the input signal provided by the signal generating circuit, and the output signal and the input signal have opposite polarities.

Noise reduction circuit and associated delta-sigma modulator

An implementation of an operational amplifier circuit includes a first stage amplifier circuit, a second stage amplifier circuit and a first feedforward circuit. The first stage amplifier circuit is coupled to a first input node for receiving a first input signal and amplifying the first input signal to generate a first amplified signal. The second stage amplifier circuit is coupled to the first stage amplifier circuit for receiving the first amplified signal and amplifying the first amplified signal to generate a first output signal at a first output node. The first feedforward circuit is coupled between the first input node and the second stage amplifier circuit for feeding the first input signal forward to the second stage amplifier circuit.

Operational amplifier circuits

A latch circuit includes an input stage, an amplifying stage and a clock gating circuit. The input stage is arranged for receiving at least a clock signal and a data control signal. The amplifying stage is coupled to the input stage and supplied by a supply voltage and a ground voltage, and is arranged for retaining a data value and outputting the data value according to the clock signal and the data control signal. The clock gating circuit is coupled to the amplifying stage, and is arranged for avoiding a short-circuit current between the supply voltage and the ground voltage.

Low-ripple latch circuit for reducing short-circuit current effect

An amplifier includes a front-end gain stage and an AC-coupled push-pull output stage. The AC-coupled push-pull output stage includes a first transistor, having a source, a drain and a gate, wherein the source of the first transistor is coupled to a first voltage level. The AC-coupled push-pull output stage further includes a second transistor, having a source, a drain and a gate, wherein the source of the second transistor is coupled to a second voltage level, the gate of the second transistor is coupled to the front-end gain stage, and the drain of the second transistor is coupled to the drain of the first transistor to form an output terminal of the amplifier. Further, the AC-coupled push-pull output stage includes an AC-coupled capacitor, which is a passive two terminal electrical component coupled between the front-end gain stage and the gate of the first transistor.

Amplifier, fully-differential amplifier and delta-sigma modulator

A sigma-delta modulator is provided for generating a digital output signal. The sigma-delta modulator is used to generate a digital output signal. The sigma-delta modulator includes a multi-stage loop filter and a quantizer. The multi-stage loop filter receives an analog input signal and generates an integrated output signal according to the analog input signal. The quantizer is coupled to the multi-stage loop filter. The quantizer receives the integrated output signal and quantizes the integrated output signal to generate the digital output signal. Different feed-forward paths of the sigma-delta modulator are available for different frequency bands.

Sigma-delta modulators with high speed feed-forward architecture

An amplifier includes a front-end gain stage and an AC-coupled push-pull output stage. The AC-coupled push-pull output stage includes a first transistor, having a source, a drain and a gate, wherein the source of the first transistor is coupled to a first voltage level; a second transistor, having a source, a drain and a gate, wherein the source of the second transistor is coupled to a second voltage level, the gate of the second transistor is coupled to the front-end gain stage, and the drain of the second transistor is coupled to the drain of the first transistor to form an output terminal of the amplifier; an AC-coupled capacitor, which is a passive two terminal electrical component coupled between the front-end gain stage and the gate of the first transistor; and a resistance component, coupling the gate of the first transistor to a bias voltage level.

A filter comprises an integrator, a signal feeding path, a first operational amplifier and a second capacitor. The integrator comprises a first input terminal and a first output terminal. The signal feeding path comprises: a first resistor, having a first terminal coupled to the first output terminal; a first capacitor, having a first terminal coupled to the second terminal of the first resistor; and a second resistor, having a first terminal coupled to the integrator and having a second terminal coupled to the second terminal of the first capacitor. The first operational amplifier comprises a second input terminal coupled to the second terminal of the first resistor and the first terminal of the first capacitor, and comprises a second output terminal. The second capacitor comprises a first terminal coupled to the second terminal of the first capacitor, and comprises a second terminal coupled to the second output terminal.

Filter with combined resonator and integrator

A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information.

Sigma-delta modulator with SAR ADC and truncater and related sigma-delta modulation method

An operational amplifier circuit includes a first stage amplifier circuit, a second stage amplifier circuit and a first feedforward circuit. The first stage amplifier circuit is coupled to a first input node for receiving a first input signal and amplifying the first input signal to generate a first amplified signal. The second stage amplifier circuit is coupled to the first stage amplifier circuit for receiving the first amplified signal and amplifying the first amplified signal to generate a first output signal at a first output node. The first feedforward circuit is coupled between the first input node and the second stage amplifier circuit for feeding the first input signal forward to the second stage amplifier circuit.

A filter is provided. The filter receives an input signal and generates an output signal according to the input signal. The filter includes an input network, a high-pass network, and an operational circuit. The first input network provides a first normal path for the input signal to generate a first normal signal. The first high-pass network provides a first high-pass path for the input signal to generate a first high-pass signal. The operational circuit has first and second input terminals. The polarity of the second input terminal is inverse to that of the first input terminal. The operational circuit receives the first normal signal by the first input terminal and the first high-pass signal by the second input terminal such that a subtraction operation is performed on the first normal signal and the first high-pass filter to accomplish a low-pass filtering operation for generating the output signal.

Growing community of inventors

Tainan, Taiwan

Hung-Chieh Tsai