Other

University System of Maryland

Westinghouse Electric Corporation

Maryland Semiconductor Inc.

Epitaxial Technologies

The United States of America As Represented by the Administrator of the

Marylabd Semiconductor, Inc.

Hung C Lin

Marvin H White

Donald R Lampe

Sen-Jung Wei

Tai-Haur Kuo

Murzban D Jhabvala

Hao Tang

Tang Hao

Weixin Kong

Ching D Wang

Chiang H Yeh

Ming-Huei Shieh

Hwey C Chien

In a direct conversion receiver with zero-frequency intermediate frequency (IF) signal, the DC offset and 1/f noise of the IF signal is compensated by means of double-sampling. The first period of the doubling-sampling is a calibration phase, which stores the DC offset and the 1/f noise. The second period is a signal flow phase during which the stored DC offset and 1/f noise is connected in opposition with the IF signal to cancel the DC offset and 1/f noise.

DC offset and 1/f noise compensation of a direct conversion receiver

A MOSFET can operate as a resistor by operating in the linear or ohmic region of the drain V-I characteristics. This region can be obtained by floating the gate of the MOSFET, when the dc current and the voltage drop are given. Multiple resistors can be duplicated (or mirrored) by sharing the same source and floating gate. The floating gate voltage can be simulated using a closed loop equivalent circuit. Alternatively, the gate voltage can also be derived from the given drain-to-source voltage and the given current in a feedback loop. With this adaptive MOSFET resistor, the minimum supply voltage can be as low as the sum of the BJT threshold and the complementary BJT saturation voltage, e.g. V&#x2267;V+Vsat (e.g. 0.8+0.15&#x3c;1.0V). The threshold voltage Vt should be less than V.

Adaptive MOSFET resistor

When two sine-wave signals in quadrature, the integral of the output is equal to zero. Conversely, when an in-phase signal is inputted as one multiplicand and the output is set to zero, a quadrature signal is derived from the second multiplicand automatically. Any analog multiplier can be used. Examples using differential pair and conductance multiplier have been demonstrated. The multiplier operates over a wideband, and the in phase and quadrature signals can be equalized automatically.

Automatic wideband quadrature frequency generator

A BJT operating as a mixer has its collector biased at the knee of the I vs V characteristic. A local oscillator voltage is applied to the base and an RF signal voltage is applied to the collector through a singled-ended emitter follower. The nonlinear curvature at the knee produces a beat frequency current. The base of the emitter follower can be fed from a current mirror or through an ohmic resistor. This mixer requires less supply voltage, and results in more conversion gain and less feed-through of the RF input signal than the Gilbert multiplier. Alternatively, the RF voltage can be applied to the gate and the local oscillator voltage can be applied to the drain. Sometimes, it is more desirable to invert the collector and the emitter, or to connect a normal transistor and an inverted transistor in parallel to optimize conversion gain.

BJT mixer for low supply voltage

Two resonant tunneling diodes with hysteretic folding V-I characteristics are connected in series. The node voltage and the series current of the cell determine the memory state and there can be a large number of states. During writing, one writing pulse sets the pull-down RTD to one of the positive differential resistance region of the hysteretic V-I characteristic, and a second writing pulse sets the pull-up RTD to one of positive differential resistance region. During writing, the series current is sensed by measuring the colon ground current.

Two-dimensional resonant tunneling diode memory cell

A two-dimensional memory comprises a matrix of multi-valued resonant tunneling diodes (RTD). Each memory cell has two series RTDs with hysteretic folding V-I characteristics. The memory state is determined by the node voltage between the two RTDs and the series current. Each memory cell has two terminals connected to two bit lines through word line switches. The two bit lines are fed with two sets of multi-valued data and are written into the cell by two consecutive pulses to set the operating point. The two sets of multi-valued data are converted by two D/A converters from two sub-words of the binary digital word. The memory state is read by the sensing the voltages at the two terminals, or voltage at one terminal and the current through the other terminal.

Two-dimensional resonant tunneling diode memory system

A multiple-valued literal circuit is implemented with resonant tunneling diodes (RTD). A number of RTD sections are connected in series with a current source. Current is tapped by a current bleeder between every two adjacent RTD sections. The current bleeders are turned on at different levels of input voltage, which is applied at the joint between the current source and the RTD sections. When the voltage reaches a certain threshold level, the current bleeder with the highest threshold voltage is turned on and taps the most current from the current source, depleting the current from other current bleeders with lower threshold voltages. Thus only one dominant current is tapped from the current source. The literal circuit can be used for multiple-valued decoders, multiplexers, demultiplexers and other multiple-valued digital systems.

Multiple-valued literal circuit using resonant tunneling diodes

The folding V-I characteristic of a resonant tunneling diode (RTD) is utilized to generate the multiple membership functions for each antecedent. The folding characteristic of an RTD generally has a triangular shape, which corresponds to the popular membership function functions commonly in use. The amount of overlap of adjacent membership functions can be adjusted by adding or substracting a dc current to or from the RTD characteristic. The use of RTD folding characteristic to generate multiple membership functions can be used in a fuzzifier to simplify circuit implementation. A time varying membership function can be generated by sweeping the RTD with a voltage ramp. This time varying membership function can be used in the defuzzifier to obtain a crisp output.

Fuzzy membership function generator using resonant tunneling diodes

A number of resonant tunneling diodes are connected in series with a resistor, a current source or a load device. A bit line is connected to every joint between any two devices through a switch. When properly biased, there can be (N+1).sup.m number of stable quantized operating points which are represented by a combination of m variables (of either voltage or current, where N is the number of peaks of the folding I-V characteristic and m is the number of bit lines. The m bit lines can write in (N+1).sup.m different combinations of inputs. During reading, the quantized voltage (or current) at each bit line is sensed. The number of stable states can be doubled by changing the polarity of the power supply.

Multi-dimensional memory cell using resonant tunneling diodes

A memory cell for multi-valued logic utilizing bidirectional folding V-I characteristics. Two devices with bidirectional multiple folding characteristics, such as the V-I characteristics of resonant tunneling diodes, are connected in series across a power supply. Multiple stable operating points are established where the positive resistance portions the folding characteristics interesect and can be used to store multiple levels of signal. With bidirectional folding characteristics, the number of operating points can be doubled by using both a positive power supply and a negative power supply. The signal can be written in and read out at the connecting point of the two devices.

Multi-valued memory cell using bidirectional resonant tunneling diodes

A pair of n-peaked resonant tunneling diodes with series resistance are connected in series across a supply voltage to form a digitizer, which has 2n+1 stable operating points. There are n high current operating points and n+1 low current operating points, corresponding to '1' and '0' logic levels. For an n-bit analog-to-digital converter, the analog input voltage is divided into n binary-weighted fractions and applied to n digitizers, which latch the divided voltages into binary currents serving as digital output.

Self-latching analog-to-digital converter using resonant tunneling diodes

A stepping counter using resonant tunneling diodes (RTDs). The stepping counter utilizes the periodic hysteresis characteristic of a device with folding characteristics such as a RTD connected in series with a resistance. The series circuit is biased in the upper portion of the hysteresis loop through a current source in the case of a step-up counter. When a positive-going pulse is applied through a capacitor across the series RTD-resistor circuit, the operating point jumps to the next highest stable operating point in the hysteresis loop responsive to the leading edge of the pulse, but is prevented from returning to the original operating point at the trailing edge of the pulse because of the hysteresis.

Stepping counter using resonant tunneling diodes

A memory cell for multi-value logic. Two devices with multiple peak folding characteristics, such as the V-I characteristics of resonant tunneling diodes, are connected in series across a power supply. Multiple stable operating points are established where the positive resistance portions of the respective folding voltage-current characteristics intersect and correspond to multiple quantized levels for storing information, creating a multi-valued memory cell.

Multi-value memory cell using resonant tunnelling diodes

An analog-to-digital converter circuit is disclosed for receiving an analog input signal and producing a digital output having a plurality of binary bits representative of the input signal. A number of devices are utilized, each of which has a voltage versus current characteristic with a plurality of peaks, and negative resistance regions between said peaks. In the illustrated embodiments, these devices are resonant tunneling diodes. For each bit to be produced, a pair of said devices are provided, each being coupled in series arrangement with a resistor. Predetermined portions of the input signal are applied to both of the series arrangements for each respective bit to be produced. Signals from both of the series arrangements are combined for each respective bit to be produced. The combined outputs respectively represent the produced binary bits. In the preferred embodiment, the means for applying predetermined portions of the input signal comprises means for applying different fractional portions of the input signal to respective pairs of series arrangements. In this embodiment, the input signal comprises an input voltage, and a voltage offset is applied to the input signal. The transition between states ('0' to '1', or vice versa) is very fast due to the high switching speed of the narrow negative resistance region of the RTD's I-V characteristic. Also, because of the judicious use of offsets, the quantization uncertainty is one-half the last significant bit size.

Analog-to-digital converter utilizing devices with current versus

The disclosure is directed to an electronic circuit and method for counting input electrical signals. An embodiment of the method of the invention includes the following steps: providing a device having a current versus voltage characteristic with a plurality of peaks, and negative resistance regions between the peaks; generating a triggering pulse in response to each input signal to be counted, and applying said triggering pulse to the device to change the voltage across the device; and outputting the voltage across the device as an indication of the number of received input signals. The device may be a resonant tunneling diode with multiple peaks in its current versus voltage characteristic. The preferred embodiment of the method of the invention includes the step of providing a load resistance means across the device. In this embodiment, the triggering pulse is operative to change the voltage across the device to a stable operating point of the device in conjunction with the load resistance means. Also in this embodiment, the step of providing a triggering pulse comprises providing a current pulse whose magnitude depends on the present stable operating point of the device in conjunction with the load resistance means. The counting technique and apparatus of the present invention operates at high speed and without undue complexity.

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Silver Spring, MD, United States of America

Hung C Lin