Texas Instruments Corporation

Hun-Lian Tsai

Ming J Hwang

Dirk N Anderson

Ih-Chin Chen

Jorge A Kittl

Bing W Shen

James G Bohlman

Jiong Ping Lu

A process for forming a W-poly gate stack (,) comprising the steps of: (1) deposition of doped polysilicon (,) on a thin dielectric layer (,) covered substrate (,), (2) deposition of WNx by a CVD-based process, (3) thermal treatment to covert WNx into thermally stable barrier, WSiNx, (,) and to remove excess nitrogen and (4) deposition of W layer (,). The stack layers are then etched to form the gate electrode (,).

CVD-based process for manufacturing stable low-resistivity poly-metal gate electrodes

A capacitor, and a method for making the same, are disclosed, wherein one plate of the capacitor comprises silicon. The dielectric material of the capacitor includes a silicon nitride layer disposed adjacent the silicon plate, and a layer of yttrium oxide disposed thereover. The second plate of the capacitor is formed over the yttrium oxide layer. The silicon nitride provides a barrier to the diffusion of silicon into the yttrium oxide film if the structure is heated, providing for a high dielectric constant capacitor dielectric which has improved leakage characteristics.

Stacked insulating film including yttrium oxide

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Dallas, TX, United States of America

Hun-Lian Tsai