Goldstar Electron Co., Ltd.

Lg Semicon Co., Ltd.

Hun Hur

Jun Seok Lee

Jae S Jeong

Young Jin Song

A method for forming a multi-layer resist (MLR) pattern capable of preventing a generation of a charge-up effect in an exposure to electron beams and reducing alignment detect errors, and employing a silylation process, thereby achieving an improvement in resonance. The method includes the steps of forming a primary alignment mark on a silicon substrate formed with a cell part including a plurality of cell patterns having steps, depositing a lower deposition film over the silicon substrate, coating a lower resist film over the lower deposition film, subjecting a portion of the lower resist film to a light exposure and a development to form a secondary alignment mark, forming an intermediate insulating layer over the lower resist film, coating an upper resist film over the intermediate insulating layer to form a MLR film, subjecting the upper resist film to a light exposure to fork a latent image pattern at a non-exposed portion of the upper resist film, subjecting the resulting structure to a silylation to form a silylated layer over the upper resist film, etching the upper resist film to form an upper resist pattern and removing the silylated layer, patterning the intermediate insulating layer by use of the upper resist pattern as a mask, and etching the lower resist film by use of the intermediate insulating layer as a mask, thereby forming a MLR pattern.

Method for forming multi-layer resist pattern

An edge enhancement phase shifting mask having a recessed opaque layer which optimally exhibits the phase shifting effect at edge portion is disclosed, wherein the mask comprises a transparent substrate having at least one or more trenches spaced apart from each other by a predetermined distance, an opaque layer filling some portion of the trench, and a phase shifting layer formed on the substrate area between the trenches. And the method of manufacturing such a mask comprises the steps of forming a first photoresist pattern by etching the coated photoresist film on a transparent substrate, forming at least one or more trenches by etching the transparent substrate masked with the patterned photoresist layer, forming a opaque layer occupying some portion of the trench through etch back process applying to a deposited metal layer on the whole surface of the substrate, forming a phase shifting layer over the surface of the non-etched transparent substrate and exposing a substrate area between the phase shifting layer and the opaque layer.

Phase shifting mask and method of manufacturing the same

Methods of making semiconductor memory cells and semiconductor memory devices capable of improving the degree of integration and simplifying the overall manufacturing processes. Within a substrate made of a semiconductor material or an insulating material, at least one trench is formed to provide a capacitor region. In the trench are formed a plate electrode, a capacitor dielectric layer and a storage node electrode which constitute a capacitor. The semiconductor substrate may be used as the plate electrode. In this case, the trench has only the capacitor dielectric layer and the storage node electrode. At the inlet of the trench filled with the constituting elements of the capacitor, a gate electrode and a semiconductor layer as an active layer are formed to extend vertically perpendicular to the trench inlet. A bit line contact is formed on the semiconductor layer. Over the bit line contact are formed a bit line contact and a bit line, in this order.

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Seoul, South Korea

Hun Hur