Yangtze Memory Technologies Co., Ltd.

Huiyuan Yue

Shiyang Yang

Implementations of the present disclosure disclose a circuit for ZQ calibration. The circuit may include a logic control circuit. The logic control circuit may include a calibration code generation circuit configured to generate an initial calibration code in response to a calibration command. The logic control circuit may include a mapping conversion circuit configured to control the calibration code generation circuit to convert the initial calibration code to a target calibration code of a target adjustment step size in response to a code adjustment signal. The circuit may further include a calibration circuit configured to calibrate interface impedance of a target semiconductor device based on the target calibration code.

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Wuhan, China

Huiyuan Yue