Intel Corporation

Huiying Liu

Justin Brockman

Robert S Chau

Ravi Pillarisetty

Brian S Doyle

Niloy Mukherjee

Uday Shah

Prashant Majhi

Kaan Oguz

Elijah V Karpov

Oleg Golonzka

Christopher J Wiegand

Markus Kuhn

Angeline Smith

Tofizur Rahman

Daniel Ouellette

Andrew Smith

James Pellegren

Ryan E Arch

Michael Robinson

Travis W LaJoie

Abhishek Anil Sharma

Moshe Dolejsi

Aaron Littlejohn

Deepyanti Taneja

Tarannum Tiasha

Yue Liu

Shardul Wadekar

Daniel J Schinke

Vladimir Nikitin

James O'Donnell

An integrated circuit includes a first layer, and a second layer above the first layer. A third layer is between a first section of the first layer and a first section of the second layer. A fourth layer is laterally adjacent to the third layer, the fourth layer between a second section of the first layer and a second section of the second layer. In an example, a first dielectric material of the third layer is different (e.g., one or both of compositionally different and structurally different) from a second dielectric material of the fourth layer. In an example, the third and fourth layers are etch stop layers. In some cases, the third and fourth layers are coplanar with each other with respect to their top surfaces, or their bottom surfaces, or both their top and bottom surfaces.

Hybrid etch stop layers

A memory device includes a first electrode, a conductive layer including iridium above the first electrode and a magnetic junction directly on the conductive layer. The magnetic junction further includes a pinning structure above the conductive layer, a fixed magnet above the pinning structure, a tunnel barrier on the fixed magnet, a free magnet on the tunnel barrier layer and a second electrode above the free magnet. The conductive layer including iridium and the pinning structure including iridium provide switching efficiency.

Magnetic memory devices and methods of fabrication

A memory device includes a first electrode, a conductive layer including iridium above the first electrode, a magnetic junction on the conductive layer and a second electrode above the magnetic junction. The magnetic junction includes a magnetic structure including a first magnetic layer including cobalt, a non-magnetic layer including platinum or tungsten on the first magnetic layer and a second magnetic layer including cobalt on the non-magnetic layer. The magnetic junction further includes an anti-ferromagnetic layer on the magnet structure, a fixed magnet above the anti-ferromagnetic layer, a free magnet above the fixed magnet and a tunnel barrier between the fixed magnet and the free magnet.

Magnetic memory devices with enhanced tunnel magnetoresistance ratio (TMR) and methods of fabrication

Resistive memory cells, precursors thereof, and methods of making resistive memory cells are described. In some embodiments, the resistive memory cells are formed from a resistive memory precursor that includes a switching layer precursor containing a plurality of oxygen vacancies that are present in a controlled distribution therein, optionally without the use of an oxygen exchange layer. In these or other embodiments, the resistive memory precursors described may include a second electrode formed on a switching layer precursor, wherein the second electrode is includes a second electrode material that is conductive but which does not substantially react with oxygen. Devices including resistive memory cells are also described.

Resistive memory cells and precursors thereof, methods of making the same, and devices including the same

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Portland, OR, United States of America

Huiying Liu