Texas Instruments Corporation

Huijuan Li

Brett E Smith

Abidur Rahman

Md Abidur Rahman

Chienyu Huang

Zheng Li

Ryan Erik Lind

Ronnie A Bean

Benjamin Matthew McCue

In some examples, a converter circuit can be configured to operate in a buck-boost mode. The converter circuit can include a ramp generator that can be configured to generate first and second ramp signals that at least partially overlap respective portions of a buck-boost region during each intermediate clock cycle between clock cycles of a clock signal. By generating the first and second ramp signals during each intermediate clock cycle, first and second drivers can be provided to toggle switches of a power stage, such that an output voltage provided by the power stage can be averaged out over clock cycles of the clock signal to allow for a gradual transition between buck and boost modes of operation of the converter circuit. In some examples, the converter circuit can be configured to operate in a test mode and can be configured to implement trimming of a ramp signal.

Ramp generator for buck/boost converters

An output stage for an LED driver is provided. In particular, a low voltage clamp, which uses several cascode circuits, is provided to protect low voltage switching transistors in the range of two times higher voltage application under both normal and fault conditions. Additionally, a circuit for regulating the bias voltage applied to each of the cascode circuits is provided to prevent damage during startup, while an internal voltage regulator is settling.

Clamp to enable low voltage switching for high voltage terminal applications

A circuit for independently controlling slew and propagation delay of a current DAC is provided. The circuit applies dual slope technique with feed-back control the gate (or control electrode) of a switching transistor to make propagation delay independent control from rise/fall slew rate. This allows one to adjust propagation delay and current slew rate separately to achieve better performance.

Method and apparatus to improve and control the propagation delay in a current slewing circuit

In a method and system for sensing current in a switching regulator (SWR) operating in a current mode, a power switch is coupled to receive the current from a switching element, the power switch being controlled by a gate signal. An inrush of the current causes an initial transient spike (ITS). A buffer having a buffer input and a buffer output is coupled to receive the gate signal and provide a buffered gate signal. The buffer output is disabled during the ITS. A sense switch (SW) is coupled to receive a portion of the current from the switching element, the SW being turned on by the buffered gate signal after the initial transient spike. A sense resistor (SR) is coupled to receive the portion of the current from the SW. An amplifier converts the portion of the current through the SR to a voltage signal for controlling the SWR.

Method of optimum current blanking time implementation in current sense circuit

Methods and apparatus for a self-tracking high-side pre-driver control are described. In an example, a method is described comprising charging a first terminal associated with a first capacitive element to a first voltage with respect to ground and a second terminal associated with a second capacitive element to a second voltage with respect to ground, changing the first voltage and the second voltage with respect to ground by changing a swing voltage, selecting one of the first voltage or the second voltage based on a first switched-mode power supply topology or a second switched-mode power supply topology and driving a transistor using the selected voltage.

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Plano, TX, United States of America

Huijuan Li