Huawei Technologies Co., Limited

Huifang Jiao

Yufeng Dai

Ronghua Xie

Ran He

Yue Pan

Chihon Ho

Guanglin Yang

Luming Fan

A memory includes S storage blocks, N global bitlines, and a signal amplification circuit. Each of the S storage blocks is connected to the N global bitlines, the N global bitlines are connected to the signal amplification circuit, the signal amplification circuit is configured to amplify electrical signals on the N global bitlines, and each storage block includes N columns of storage units, N local bitlines, and N bitline switches. In each storage block, storage units in an icolumn are connected to an ilocal bitline, the ilocal bitline is connected to an iglobal bitline by using an ibitline switch in the N bitline switches. A memory array is fine-grained, so that ilocal bitlines in the S storage blocks can share one global bitline.

Data reading/writing method, memory, storage apparatus, and terminal

Embodiments of this application disclose a hybrid bonding structure and a hybrid bonding method. The hybrid bonding structure includes a first chip and a second chip. A surface of the first chip includes a first insulation dielectric and a first metal, and a first gap area exists between the first metal and the first insulation dielectric. A surface of the second chip includes a second insulation dielectric and a second metal. A surface of the first metal is higher than a surface of the first insulation dielectric. Metallic bonding is formed after the first metal is in contact with the second metal, and the first metal is longitudinally and transversely deformed in the first gap area. Insulation dielectric bonding is formed after the first insulation dielectric is in contact with the second insulation dielectric.

Hybrid bonding structure and hybrid bonding method

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Shenzhen, China

Huifang Jiao