Seagate Technology Incorporated

Hui Su

Prafulla Bollampalli Reddy

Gregory Paul Moller

Ara Patapoutian

John Stuart Wright

Hieu Van Nguyen

Michelle Elaine Blankenship

Eddie Wai Pun

Timothy Richard Feldman

Bernardo Rub

James Joseph Touchton

Peter Igorevich Vasiliev

Kendall Hayne Fung

Dan Joseph Coonen

Mary Elizabeth Dunn

Jonathan L Damron

An implementation of a system disclosed herein provides a method of deferring decoding of a data sector received at a read channel of a storage device, in response to determining that a data sector cannot be decoded by a first decoder and storing the data sector for further processing by a second decoder.

Read channel throughput management

Values are grouped into a first set of groupings of values. Based on inner codes, the number of groupings in the first set of groupings that have at least one erroneous value is determined. If the number of groupings in the first set of groupings that have an erroneous value is fewer than a maximum number of groupings that can be corrected by outer codes, a seek operation is begun. During the seek operation, the outer codes are used to detect and correct the erroneous values that were produced during the reading of values. In other aspects, a parity section for a data section of a data storage device is dirtied before writing any data to the data section such that if writing to the data section is interrupted, the parity section will indicate that it should not be used to correct data read from the data section.

Outer code error correction

A data storage device such as a disc drive is described that has a controller chip with an integral embedded read/write channel on the chip. The chip includes a built in test capability for testing the controller logic via the device microprocessor and a nonreturn to zero test FIFO and control logic module. The module includes an internal first in/first out buffer (FIFO) that has variable data speeds and is provided on the chip to provide the test capability thereby permitting testing that would otherwise be difficult to perform.

Built in full speed nonreturn to zero test method and apparatus for a data storage device controller

A method is provided for handling errors in a data storage system. The method includes determining a number of sectors to be accessed. Also, all sectors from the number of sectors are accessed during a first access routine. Next, error sectors are identified and the error sectors are accessed during a second access routine.

Data sector error handling mechanism

A data storage device exhibiting reduced pad regions includes a read/write channel to convert transduced waveforms from a storage medium into recovered digital information. The recovered digital information is communicated from the read/write channel to a controller. The read/write channel includes an analog stage and a digital stage, which function independently. While the digital stage is engaged in the task of recovering servo data, the analog stage may be engaged in the task of recovering user data. Initially, the controller generates a control signal commanding the read/write channel to read and recover servo data. In the wake of the last unit of servo data having been processed by the analog stage of the read/write channel, the controller commands the read/write channel to read user data from the disc. Therefore, the analog stage of the read/write channel reads user data, while the digital stage finishes processing the servo data.

NRZ pipeline servo while reading or writing

A method is provided for reducing growth errors in disc drive. First, a number of sectors to be read is determined. Data is then read from all sectors of the number of sectors on a disc during a first disc revolution. Next, error sectors having a number of errors above a predetermined threshold are identified. The error sectors are then corrected and written to the disc during a second disc revolution. In addition, a disc drive having a controller for implementing the above method is provided.

Data sector error tracking and correction mechanism

A disc sequencer incorporating parallel state machines to support both pipelined and non-pipelined read modes is disclosed. The parallel state machines include a first state machine and a second state machine for controlling whether data are read from a disc media and transferred to a buffer via a channel interface coupled to a read/write channel. Data may be read through the read/write channel in either pipelined or non-pipelined mode. If an operational state of either state machine is active, then the transfer of data between a read/write head accessing the media and the buffer is enabled. The operational state of the first state machine is dependent on the operational state of the second state machine such that if the second state machine is active, the operational state of the first machine will go active on the following clock period.

Growing community of inventors

Longmont, CO, United States of America

Hui Su