Chengdu Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Biocytogen Pharmaceuticals (beijing) Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Skyphy Networks Limited

Skyphy Neworks Limited

Hui Lu

Ling Shi

Yipeng Chen

Ke Liu

Zhu Wang

Zhenglong Yan

Zhenhua Zhang

Yuelei Shen

Jiawei Yao

Shuai Xie

Changchang Liu

Yabo Zhang

Huizhen Zhao

Lili Liu

Yanyang Shang

Shuwen Huang

Jack Han Chin Tai

Hong Helena Zheng

Shuo Li

Hui Yang

Yong Yu

Chen Wang

Tao Gao

Chang Zhang

Peng Huang

Yao Hu

Fei Fang

Teng Chen

Xuewei Tian

Guoyi Cui

Zeliang Li

Xiaoqi Ding

Dan Guo

Gang Qiang

Chuanyong Li

Xinlei Yang

Shao Jie Zhang

A display substrate, a manufacturing method therefor, and a display apparatus are provided. The display substrate includes a first semiconductor layer, a first conductive layer, a second conductive layer, a second semiconductor layer, a third conductive layer, a fourth conductive layer, and a fifth conductive layer disposed on an substrate. The first semiconductor layer includes active layers of a plurality of poly silicon transistors, the first conductive layer includes gates of a plurality of poly silicon transistors, a first electrode plate of a storage capacitor and a first scan signal line. The second conductive layer includes a second electrode plate of the storage capacitor. The second semiconductor layer includes active layers of a plurality of oxide transistors. The third conductive layer includes gates of the plurality of oxide transistors.

Display substrate, manufacturing method therefor, and display apparatus

Provided are a display substrate, a preparation method thereof and a display apparatus. The display substrate includes a first semi-conductive layer, a first conductive layer, a second conductive layer, a second semi-conductive layer, a third conductive layer, an interlayer insulating layer and an organic layer stacked on a substrate. The first semi-conductive layer includes an active layer of a polysilicon transistor, the first conductive layer includes a gate electrode of a polysilicon transistor and a first electrode plate of a storage capacitor, the second conductive layer includes a second electrode plate of a storage capacitor, the second semi-conductive layer includes an active layer of an oxide transistor, and the third conductive layer includes a gate electrode of an oxide transistor.

Display substrate, preparation method thereof, and display apparatus

Embodiments of the disclosure provide a touch display panel and a display device. The touch display panel includes a base substrate, where the base substrate includes a display area, a bezel area surrounding the display area and a bonding area extending from the bezel area on one side; and a touch structural layer, on a side of the base substrate. The touch structural layer includes a plurality of touch traces in the bezel area; and at least part of the touch traces are single-layered traces and adjacent single-layered touch traces are disposed in different layers.

Touch display panel and display device

Provided is a display panel, including: a base substrate provided with a first display region and a second display region; a first auxiliary electrode layer, a first anode layer, a first light-emitting layer and a first cathode layer that are sequentially laminated, in a direction away from the base substrate, in the first display region; and a second auxiliary electrode layer, a second anode layer, a second light-emitting layer, and a second cathode layer that are sequentially laminated, in the direction away from the base substrate, in the second display region; wherein the first auxiliary electrode layer is connected to the first cathode layer and the second auxiliary electrode layer, and the second cathode layer is connected to the first cathode layer, the second cathode layer is provided with at least one hollowed-out region.

Display panel, method for manufacturing same, and display device

A display substrate includes a first wiring region () and a second wiring region (), wherein the first wiring region () is provided with at least one first wiring () and a light emitting device, the second wiring region () is provided with at least one second wiring () and a light emitting device, and the light emitting device at least includes an anode (). The first wiring region () further includes at least one first compensation line (), an orthographic projection of the at least one anode () in the plane of the display substrate at least partially overlaps with an orthographic projection of the first compensation line () in the plane of the display substrate.

Provided is a shift register unit. The shift register unit includes a first input circuit, a second input circuit and an output circuit. The first input circuit is coupled to a first clock terminal, a first node, a second node, a third node, a pull-up power supply terminal, and a pull-down power supply terminal. The second circuit is coupled to the first node, the second node, the third node, the pull-up power supply terminal, the pull-down power supply terminal, an input control terminal, and the first clock terminal. The output circuit is coupled to the pull-up power supply terminal, the pull-down power supply terminal, the third node, a second clock terminal, and an output terminal.

Shift register unit and driving method therefor, gate drive circuit, and display device

A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a gate driving circuit including shift register units and clock signal lines including a first clock signal line, a second clock signal line providing a second clock signal, and a third clock signal line providing a third clock signal. An input circuit of a n-th stage shift register unit in the shift register units is connected with the first clock signal line, a first control circuit of the n-th stage shift register unit is connected with the first clock signal line, the second clock signal line, and the third clock signal line, a second control circuit of the n-th stage shift register unit is connected with the second clock signal line, and a phase of the second clock signal is opposite to a phase of the third clock signal.

Display substrate, display device, and manufacturing method of display substrate

A display substrate includes first and second display regions, and a base substrate. A plurality of sub-pixels are arranged on a side of the base substrate, where the-sub-pixels include a first pixel driving circuit and a first light-emitting device connected to each other in the first display region, and the first pixel driving circuit includes at least a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor and the light-emitting device initialization transistor, or that of the active layer of each of the switching transistor and the light-emitting device initialization transistor on the base substrate.

Display substrate, display panel and display apparatus

A pixel circuit includes a driving circuit, an energy storage circuit, a first control circuit, a first reset circuit and a data writing-in circuit; the first control circuit is configured to control to connect the second node and a first terminal of the driving circuit under the control of a light-emitting control signal; the first reset circuit is configured to write a reference voltage into the second node under the control of a first reset control signal; the data writing-in circuit is configured to write a data voltage into the first terminal of the driving circuit under the control of a scan signal; the driving circuit is configured to control to connect the first terminal of the driving circuit and the second terminal of the driving circuit under the control of the control terminal of the driving circuit.

Pixel circuit, driving method, display substrate and display device

The present disclosure relates to genetically modified animals and cells with humanized heavy chain immunoglobulin locus and/or humanized light chain immunoglobulin locus.

Genetically modified non-human animals with humanized immunoglobulin locus

This disclosure relates to genetically modified animals and cells with humanized light chain immunoglobulin locus and/or humanized heavy chain immunoglobulin locus. In one aspect, the endogenous light chain immunoglobulin locus comprises a limit number of human IGKV genes and human IGKJ genes.

Genetically modified non-human animals with common light chain immunoglobulin locus

A display substrate, a display panel and a display apparatus are provided. The display substrate includes a base substrate, a first display region, and a second display region, and a light transmittance of the first display region is greater than that of the second display region A plurality of sub-pixels are arranged on the base substrate and in the first display region, wherein the sub-pixels include a first pixel driving circuit and a first light-emitting device, and the first pixel driving circuit includes a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor, the switching transistor and the light-emitting device initialization transistor on the base substrate.

A shift register, comprising an input circuit, a first control circuit, a second control circuit and an output circuit. The input circuit is configured to transmit a first voltage signal from a first voltage signal terminal to a first node under the control of an input signal from a signal input terminal. The first control circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a second node under the control of a first clock signal from a first clock signal terminal and the voltage of the first node. The second control circuit is configured to transmit a second clock signal from a second clock signal terminal to a third node under the control of the voltage of the second node. The output circuit is configured to transmit the first voltage signal from the first voltage signal terminal to a scan signal output terminal under the control of the voltage of the third node.

Shift register and driving method therefor, gate driver circuit, and display apparatus

The present invention provides methods for noise reduction and bandwidth expansion in wireless communication and the devices thereof. The method in accordance with the present invention may include identifying a plurality of neighbor nodes with respect to a central node; sending a first communication signal to the plurality of neighbor nodes, wherein the first communication signal is only sent to the nodes that are considered as the plurality of neighbor nodes by the central nodes; and based on the first communication signal, when the central node is transmitting data to one of the plurality of neighbor nodes, the other nodes of the plurality of neighbor nodes do not send data in the same channel, thereby reducing the noise in the wireless network.

Growing community of inventors

Beijing, China

Hui Lu