Nan Ya Technology Corporation

Hui-Lin Chen

Yu-Ting Lin

Mao-Ying Wang

Lai-Cheng Tien

The present application discloses a semiconductor device. The semiconductor device includes a substrate comprising an array area and a peripheral area adjacent to the array area; word line structures positioned in the array area; a word line hard mask layer positioned on the array area; a word line protection layer positioned on the word line hard mask layer; a gate electrode layer positioned on the peripheral area and separated from the word line hard mask layer and the word line protection layer; a peripheral protection layer positioned on the to gate electrode layer; and a first hard mask layer positioned over the array area and the peripheral area. A horizontal distance between the word line protection layer and the gate electrode layer is greater than or equal to three times of a thickness of the first hard mask layer.

Semiconductor device with single step height

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The method for fabricating the semiconductor device includes providing a substrate including an array area and a peripheral area adjacent to the array area, forming word line structures and source/drain regions in the array area, and a word line protection layer on the array area, forming a first hard mask layer over the substrate and having a step height adjacent to a border between the array area and the peripheral area, forming a bit line contact in the array area and between the word line structures by using the first hard mask layer as a pattern guide, and forming a gate electrode layer on the peripheral area.

Growing community of inventors

Keelung, Taiwan

Hui-Lin Chen