Avago Technologies General IP (singapore) Pte. Ltd.

Hui Fung Sim

Chee Heng Wong

Richard Lum

Peng Siang Seet

An amplification system, circuit, and method of performing offset cancellation are described. The disclosed amplification system is described as including a main amplifier circuit that receives an input signal and produces an output signal, a two-phase output sampler, and an offset correction circuit. The two-phase output sample samples the output signal of the main amplifier circuit in two different clock domains and determines a delta between the samples. The delta is used to assist the offset correction circuit in generating an offset correction feedback for the main amplifier circuit.

Auxiliary control of system offsets

An isolation device having first and second semiconductor is disclosed. The first semiconductor die may be adapted to transmit a first signal to the second semiconductor die that is electrically isolated. The first semiconductor die may comprise input terminals, a bitstream encoding circuit, a self-synchronizing encoding circuit and a transmitter. The second semiconductor die may comprise a receiver, a self-synchronizing decoder, a bitstream decoding circuit and an optional digital filter. The bitstream encoding and decoding may enable a plurality of signals to be encoded and transmitted through an isolation material.

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Singapore, Singapore

Hui Fung Sim