National Instruments Corporation

National Insurance Corporation

Hugo A Andrade

Brian Keith Odom

Jeffrey L Kodosky

Cary Paul Butler

Joseph E Peck

Matthew E Novacek

Newton G Petersen

Brian Sierer

John Pasquarette

Ganesh Ranganathan

David W Fuller, Iii

Jacob Kornerup

Gregory O Morrow

Samson L DeKey

Michael L Santori

Darshan K Shah

Andrew Philip Dove

Bob Mitchell

Kaushik Ravindran

Jogen Pathak

Todd Brower

Guang Yu Yang

Steven W Rogers

Jeffrey N Correll

Andrew C Mihal

Kevin Hogan

Duncan G Hudson, Iii

John C Limroth

Rishi H Gosalia

James C Nagle

Arthur M Ryan

Rhishikesh Limaye

Brian C MacCleery

J Marcus Monroe

Alexandre M Barp

Abhay Shah

Kevin L Schultz

Aljosa Vrancic

James J Truchard

Ian C Wong

Biren Shah

Guoqiang Wang

Michael J Trimborn

Arkadeb Ghosal

Dan Mondrik

Trung N Tran

Garritt W Foote

Perry C Steger

Rodney W Cummings

B Keith Odom

David L Potter

Sadia B Malik

John R Allen

Ankita Prasad

Patricia Derler

Lukasz T Darowski

Abhay S Shah

Charles E Crain Ii

Guang Yang

A method for determining timing constraints in dataflow models is disclosed. The method includes receiving node information specifying a plurality of dataflow nodes, as well as coupling between various ones of the dataflow nodes. The method further comprising receiving timing information specifying timing constraints for at least some of the dataflow nodes. Based on the node information, the couplings between the nodes, and the timing information, a timeline dependency graph (TDG). The timeline dependency graph illustrates a timeline, mappings between nodes with side effects to firing times of those nodes on the timeline, and dependencies between nodes.

Determination of timing configurations for program dataflow models

System and method for configuring a system of heterogeneous hardware components, including at least one: programmable hardware element (PHE), digital signal processor (DSP) core, and programmable communication element (PCE). A program, e.g., a graphical program (GP), which includes floating point math functionality and which is targeted for distributed deployment on the system is created. Respective portions of the program for deployment to respective ones of the hardware components are automatically determined. Program code implementing communication functionality between the at least one PHE and the at least one DSP core and targeted for deployment to the at least one PCE is automatically generated. At least one hardware configuration program (HCP) is generated from the program and the code, including compiling the respective portions of the program and the program code for deployment to respective hardware components. The HCP is deployable to the system for concurrent execution of the program.

Graphical development and deployment of parallel floating-point math functionality on a system with heterogeneous hardware components

Global optimization and verification of cyber-physical systems using graphical floating point math functionality on a heterogeneous hardware system (HHS). A program includes floating point implementations of a control program (CP), model of a physical system (MPS), objective function, requirements verification program (RVP), and/or global optimizer. A simulation simulates HHS implementation of the program using co-simulation with a trusted model, including simulating behavior and timing of distributed execution of the program on the HHS, and may verify the HHS implementation using the RVP. The HHS is configured to execute the CP and MPS concurrently in a distributed manner. After deploying the program to the HHS, the HHS is configured to globally optimize (improve) the CP and MPS executing concurrently on the HHS via the global optimizer. The optimized MPS may be usable to construct the physical system. The optimized CP may be executable on the HHS to control the physical system.

Global optimization and verification of cyber-physical systems using floating point math functionality on a system with heterogeneous hardware components

System and method for optimizing a data flow diagram based on access pattern information are described. Access pattern information for a data flow diagram may be received. The data flow diagram may include a plurality of interconnected actors, e.g., functional blocks, visually indicating functionality of the data flow diagram. The access pattern information may include one or more of: input pattern information specifying cycles on which tokens are consumed by at least one of the actors, or output pattern information specifying cycles on which tokens are produced by at least one of the actors. A program that implements the functionality of the data flow diagram may be generated based at least in part on the access pattern information.

Optimization of a data flow program based on access pattern information

System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.

Developing programs in a graphical specification and constraint language

Developing programs for hardware implementation in a graphical specification and constraint language Via iterative estimation of performance or resource utilization

A system and method for deploying one or more graphical programs on a personal digital assistant (PDA). One or more selected graphical programs may be programmatically converted to an executable format that can be executed by the portable computing device. For example, the graphical programs may be initially represented as a plurality of data structures that define or specify the operation of the respective graphical programs, and conversion software program may operate to access these data structures from memory and convert the data structures to an executable format suitable for the portable computing device. The executable may be transferred to the portable computing device for execution.

Distributed graphical program execution using a handheld computer

System and method for debugging a graphical program deployed to hardware. The graphical program may be received. The graphical program may include a plurality of nodes and connections between the nodes which visually represents functionality of the graphical program. A hardware description may be generated based on the graphical program. The hardware description may describe a hardware implementation of the graphical program. The hardware description may be deployed to the programmable hardware element and the programmable hardware element may be executed. The graphical program may be displayed on a display of a host computer system that is coupled to the programmable hardware element. Debugging information may be received from the programmable hardware element during the executing. The debugging information from the programmable hardware element may be displayed in the graphical program displayed on the display. The displayed debugging information may be used to debug the hardware implementation of the graphical program.

Debugging a graphical program deployed on a programmable hardware element

Generating a hardware description for a programmable hardware element based on a graphical program including multiple models of computation. A graphical program may be received which includes a first portion having a first computational model and a second portion having a second computational model. A hardware description may be generated based on the graphical program. The hardware description may describe a hardware implementation of the graphical program. The hardware description may be configured to configure a programmable hardware element to implement functionality of the graphical program.

Generating a hardware description for a programmable hardware element based on a graphical program including multiple models of computation

Generating a hardware description for a programmable hardware element based on a graphical program including multiple physical domains. A graphical program may be received which includes a first portion of a first physical domain for simulating a first portion of a physical system. The graphical program may include a second portion of a second physical domain for simulating a second portion of the physical system. A hardware description may be generated based on the graphical program. The hardware description may describe a hardware implementation of the graphical program. The hardware description may be configured to configure a programmable hardware element to simulate the physical system.

Generating a hardware description for a programmable hardware element based on a graphical program including multiple physical domains

A system and method for specifying timing relationships among nodes in a graphical program. User input specifying desired timing of a first node with respect to timing of a second node may be received. In various embodiments, any kind of timing relationship or timing constraint between the first node and the second node may be specified. Timing information may be displayed on the display to visually indicate the timing of the first node with respect to timing of the second node. In one embodiment, displaying the timing information may comprise displaying a timing wire between the first node and the second node. The graphical program may be executed in such a way that the visually indicated timing of the first node with respect to timing of the second node is satisfied.

Graphically representing timing in a graphical program

Timing wires in a graphical program

A system and method for online configuration of a measurement system. The user may access a server over a network and specify a desired task, e.g., a measurement task, and receive programs and/or configuration information which are usable to configure the user's measurement system hardware (and/or software) to perform the desired task. Additionally, if the user does not have the hardware required to perform the task, the required hardware may be sent to the user, along with programs and/or configuration information. The hardware may be reconfigurable hardware, such as an FPGA or a processor/memory based device. In one embodiment, the required hardware may be pre-configured to perform the task before being sent to the user. In another embodiment, the system and method may provide a graphical program in response to receiving the user's task specification, where the graphical program may be usable by the measurement system to perform the task.

Network based configuration of a system using software programs generated based on a user specification

System and method for creating a graphical program that uses multiple models of computation (MoC). A first plurality of graphical program elements is assembled in a graphical program in response to first input, where the assembled first plurality of graphical program elements have a first MoC. A structure is displayed in the graphical program indicating use of a second MoC for graphical program elements comprised within the interior of the structure. A second plurality of graphical program elements is assembled within the structure in response to second input, where the assembled second plurality of graphical program elements have the second MoC. The graphical program is executable to perform a function, for example, by executing the assembled first plurality of graphical program elements in accordance with the first model of computation, and executing the assembled second plurality of graphical program elements in accordance with the second model of computation.

Graphical programming environment with first model of computation that includes a structure supporting second model of computation

Growing community of inventors

Austin, TX, United States of America

Hugo A Andrade