Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Arkema France

Hubert Teyssedre

Stefan Landis

Nicolas Posseme

Christophe Navarro

Xavier Chevalier

Celia Nicolet

Zouhir Mehrez

Florian Delachat

Michael May

Michaël May

A process for transfer imprinting using a novel family of anti-sticking layers, such as for nanoimprint lithography processes, is described.

Process for transfer imprinting

A method for manufacturing a mould for nanoprinting and the associated mould, includes providing a substrate having a layer, and at least one ion implantation configured so as to obtain in the layer, at least one first non-implanted portion or portion having a first implantation, at least one second portion having a second implantation, and a third non-implanted portion distinct from the first portion. After implantation, the method includes etching the layer configured so as to have a different etching speed between at least the second portion and the third portion, so as to etch through the openings of an etching mask, a plurality of patterns of different heights being included in the layer.

Method for manufacturing a mould for nanoprinting and associated mould

The invention relates to a method for making an individualization zone of a microchip comprising a first (A) and a second (A) level of electrical tracks (), and a conductor layer (A) comprising via holes (), the method comprising the following steps:

Method of making an individualization zone of an integrated circuit

A method is provided for producing a microelectronic device having a subsequent grating of reliefs of which at least one wall is slanted, the method including providing a structure including a base, and an initial grating of reliefs, each relief having at least one proximal end in contact with the base, a distal end, and at least one wall extending between the proximal end and the distal end; and laying the reliefs of the initial grating on one another, by application of at least one stress on the structure, such that walls facing two adjacent reliefs come into contact, thus generating at least one subsequent grating of reliefs of which at least one wall is slanted.

Method of manufacturing a microelectronic device having an array of inclined reliefs

A method for producing an individualisation area includes providing at least a first level of the electrical tracks. The method includes depositing a dielectric layer and a deformable layer on the interconnection level. The method includes producing, in an area of the deformable layer, recessed patterns, by penetrating an imprint mould into the deformable layer, the production of the patterns being configured so that the patterns have a randomness in the deformable layer, thus forming random patterns. The method includes transferring the random patterns into the dielectric layer to form transferred random patterns therein and exposing the vias located in line with the transferred random patterns. The method includes filling the transferred random patterns with an electrically conductive material so as to form electrical connections between vias. The method includes producing a second level of the electrical tracks on the vias and the electrical connections.

Process of realization of an area of individualization of an integrated circuit

A method for securing an integrated circuit during the realization thereof, including the following steps: delimiting the integrated circuit into a first zone referred to as standard zone and into a second zone referred to as security zone, forming of a set of vias in the security zone, and introducing of a layer loaded with contaminant particles configured to randomly obstruct a portion of the vias, thus forming a random interconnection structure in the security zone, the random interconnection structure creating a physical unclonable function.

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Grenoble, France

Hubert Teyssedre