Infineon Technologies Ag

Infineon Technologies Austria Ag

Siemens Aktiengesellschaft

Autoliv Asp, Incorporated

Other

Hubert Rothleitner

Michael Breunig

David James Tippy

Vincent Colarossi

Colm Peter Boran

Myron Senyk

Anton Mauder

Marten Swart

Derek Bernardon

Paul Mario Camilleri

Hans-Joachim Schulze

Franz Hirler

Andreas Peter Meiser

Jenoe Tihanyi

Peter Bogner

Rainald Sander

Leo Aichriedler

Dieter Haerle

Hermann Gruber

Alexander Mayer

Ludwig Leipold

Horst Belau

Wolfgang Scholz

Philipp Seng

Daniel Pedone

Peter Tuerkes

Franz Wachter

Christian Kasztelan

Ekkehart-Peter Wagner

Johann Massoner

Ralf Kissling

Stefan K&ouml;sters

Rolf Gerlach

Benoit Picaud

Udo John

Timothy John Blind

A temperature protected power semiconductor device has a substrate which includes a power field effect transistor (FET) and a thermosensitive element. The power FET has a gate electrode connected to a gate, a drift region, and first and second terminals for a load current. The load current is controllable during operation by a voltage applied between the gate and the first terminal. The thermosensitive element has a first contact connected to one of the gate electrode and first terminal of the power FET, and a second contact connected to the other one of the gate electrode and first terminal. The thermosensitive element is located close to the power FET and thermally coupled thereto. The thermosensitive element is configured to cause the power FET to reduce the load current in case of an exceedance of a limit temperature of the power FET, by interconnecting the gate and first terminal.

Power semiconductor device with integrated temperature protection

A one-time programming device includes a field effect semiconductor transistor with a gate or a channel region of the field effect semiconductor transistor including a shape of a footprint so that in an on-state of the field effect semiconductor transistor a critical electrical field is reached within an area of the channel region, a bulk region or a drain region of the field effect semiconductor transistor due to the shape of the footprint resulting in a damage of a p-n junction between the channel region or the bulk region and the drain region of the field effect semiconductor transistor or resulting in a damage of a gate insulation of the field effect semiconductor transistor after a predetermined programming time.

One-time programming device and a semiconductor device

In various embodiments a circuit is provided including: an input terminal to receive an input voltage; a switch, a first controlled input of which being coupled to the input terminal; an inductor, a first terminal of which may be coupled in series to a second controlled input of the switch; a freewheeling diode, wherein a first diode terminal may be coupled with the second controlled input of the switch and with the first terminal of the inductor, and wherein a second diode terminal may be coupled with a reference potential; a capacitor coupled with a second terminal of the inductor; and a controller configured to operate the switch and the inductor in continuous current mode to charge the capacitor.

Inrush current limiting circuit

A MOS transistor structure for matched operation in weak-inversion or sub-threshold range (e.g. input-pair of operational amplifier, comparator, and/or current-mirror) is disclosed. The transistor structure may include a well region of any impurity type in a substrate (SOI is included). The well-region can even be represented by the substrate itself. At least one transistor is located in the well region, whereby the active channel-region of the transistor is independent from lateral isolation interfaces between GOX (gate oxide) and FOX (field oxide; including STI-shallow trench isolation).

Transistor structure with reduced parasitic side wall characteristics

A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer.

Method for producing a semiconductor component with insulated semiconductor mesas

In various embodiments an analog-to-digital converter arrangement is provided, which may include an input terminal configured to receive a signal to be converted; a reference terminal configured to receive a reference signal; a voltage domain specific reference terminal configured to receive a voltage domain specific reference signal; an analog-to-digital converter circuit coupled to the input terminal, the reference terminal, and to the voltage domain specific reference terminal configured to compare the signal to be converted with the voltage domain specific reference signal, thereby generating a first digital comparison signal, and to compare the reference signal with the voltage domain specific reference signal, thereby generating a second digital comparison signal; and a ratiometric circuit configured to determine a digitally converted signal of the signal to be converted using the first digital comparison signal and the second digital comparison signal.

Ratiometric ADC circuit arrangement

A drive circuit for a firing element of an occupant protection system comprises first and second supply potential terminals and first and second firing element terminals. A first semiconductor switching element is integrated in a first semiconductor body and has a first load terminal coupled to the first supply potential terminal and a second load terminal coupled to the first firing element terminal. A second semiconductor switching element is integrated in a second semiconductor body and has a first load terminal coupled to the second firing element terminal and a second load terminal coupled to the second supply potential terminal. The first and second semiconductor bodies are applied to a thermally conductive carrier element and commonly housed. A temperature detector is integrated in the second semiconductor body and provides an overtemperature signal at an output of the drive circuit upon detection of an overtemperature of the first semiconductor switching element.

Drive circuit for a firing element of an occupant protection system

A driver and receiver circuit includes at least one output terminal for connecting a line connection. The circuit further includes a voltage supply arrangement connected to the at least one output terminal and a current measuring arrangement connected to the at least one output terminal. The current measuring arrangement is designed to detect a current at the at least one connecting terminal and to generate a current measurement signal dependent on said current. The driver and receiver circuit further includes a control circuit, to which the current measurement signal is fed, and at least one monitoring circuit. The monitoring circuit is designed to detect the current at the at least one connecting terminal and to output an error signal if the current lies above a predetermined threshold value for a time duration which is longer than a predetermined first time duration.

Driver and receiver circuit for a remotely arranged circuit and corresponding method

Driving circuit for an ignition element of a passenger protection system The present invention relates to a driving circuit for an ignition element of a passenger protection system which has the following features:

Driving circuit for an ignition element of a passenger protection system

A drive circuit for a firing cap, triggerable by an electric direct current firing pulse, of a vehicle restraint system, has a firing circuit which forms a series connection of a high side switch to the firing cap and to a low side switch. The firing circuit is connected between a supply voltage of a first potential, and a reference voltage of a second potential, in parallel with a capacitor that stores energy. The firing circuit being activated by a drive signal which is fed simultaneously to the high side switch and the low side switch, in order to feed a firing current to the firing cap during the firing pulse. In addition, in the firing circuit, a power switching element is also connected in series with the high side switch and the low side switch in order to draw lost power from the firing circuit during the firing pulse.

Drive circuit for a firing cap of a vehicle restraint system

An integrated MOS power transistors, in particular a lateral PMOS power transistor and a lateral n-DMOS power transistor, in which the bulk node is disposed in a manner spatially isolated from the source electrode zone. The particular integration structure of the MOS power transistor avoids a parasitic drain-bulk diode, a parasitic body diode and a substrate diode and thereby achieves an area-saving protection against over-currents in the event of reverse voltage polarity between drain and source.

MOS power transistor

A backup power supply for a restraint control module is disclosed that includes a main power source that is connected to a backup power source charging circuit. A boost converter control and driver circuit is connected with the main power source and the backup power source such that the boost converter control and driver circuit controls the charging of the backup power source with the main power source during normal operation. A backup power supply control and driver circuit is connected with a backup power supply switching device. The backup power supply control and driver circuit switches the source of power from the main power source to the backup power source when the backup power supply control circuit senses a loss of power from the main power source.

Backup power supply for restraint control module

A non-inverting dual voltage regulation set point power supply for a restraint control module is disclosed that includes a main power source. A regulated voltage generation circuit connected with said main power source for generating a regulated output voltage having an upper set point and a lower set point. A buck switch connected to said main power source and said regulated voltage generation circuit for bucking the regulated output voltage generated by said regulated voltage generation circuit to said upper set point if said voltage supplied from said main power source is greater than said upper set point. A boost switch connected with said regulated voltage generation circuit for boosting the regulated output voltage generated by said regulated voltage generation circuit to said lower set point if said voltage supplied from said main power source is less than said lower set point.

Non-inverting dual voltage regulation set point power supply using a single inductor for restraint control module

A method and system for measuring the capacitance of a backup power source in a backup power supply system is disclosed by the present invention. The regulated output voltage is set to a nominal regulated output voltage during normal operation and then adjusted to a predetermined regulated output voltage during a capacitance measurement. A pair of predetermined loads is connected to the backup power source in consecutive order for discharging energy from the backup power source. A counter is used to count the time that elapses before the regulated output voltage reaches the lower regulated output voltage or the backup power supply system begins regulating. The resulting counts are used by a main control unit, together with several other known values, to determine the capacitance of the backup power source.

Growing community of inventors

Villach, Austria

Hubert Rothleitner