Boe Technology Group Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Huanyu Li

Jian Zhao

Mo Chen

Jinliang Liu

Yang Zhang

Peng Li

Jilei Gao

Jing Sun

Miao Zhang

Jideng Zhou

Songmei Sun

Wuxia Fu

Xiuli Si

Yi Wang

Wei Feng

Ran Zhang

Ge Wang

Rongcheng Liu

Xiong Xiong

Yudong Liu

Xiaozhe Zhang

Fangqing Li

Chengying Cao

A display panel, a manufacturing method thereof, and a display device are provided. The display panel has a display area and a peripheral area surrounding the display area, the display panel includes a first substrate, a second substrate disposed opposite to the first substrate, and a sealing member. The sealing member is disposed between the first substrate, and the second substrate and located in the peripheral area, and configured to hermetically connect the first substrate and the second substrate, the sealing member includes a first sealant and a first retaining wall, an orthographic projection of the first retaining wall on the second substrate is at least partially overlapped with an orthographic projection of the first sealant on the second substrate, and elastic modulus of a material of the first sealant is greater than elastic modulus of a material of the first retaining wall.

Display panel, manufacturing method thereof, display device, and substrate

The present disclosure is related to a gate driving circuit. The gate driving circuit may include a first pull-up subcircuit; a second pull-up subcircuit; a first pull-down subcircuit; and a second pull-down subcircuit. The first pull-up subcircuit may be configured to output a high level to the output terminal under control of a first control signal of a first control signal terminal. The second pull-up subcircuit may be configured to output a high level to the output terminal under control of a second control signal of a second control signal terminal. The first pull-down subcircuit may be configured to pull down a level of the output terminal under control of the first control signal. The second pull-down subcircuit may be configured to pull down the level of the output terminal under control of the second control signal.

Gate driving circuit, driving method thereof, and display apparatus

A common voltage compensation circuit unit including a trigger signal terminal, a common voltage output terminal, a design common voltage signal terminal, a power signal terminal, a compensation common voltage signal terminal, a reset signal terminal, a clock signal terminal, a trigger signal input sub-circuit, a first output sub-circuit, a control sub-circuit, a second output sub-circuit, and a reset sub-circuit. The present disclosure further provides a display panel, a display device, and a common voltage compensation method for a display panel.

Common voltage compensation circuit unit, display panel, display device, and common voltage compensation method for display panel

Disclosed are a shift register unit, a gate driving circuit and a driving method thereof, the shift register unit including: an input sub-circuit configured to provide a trigger signal received by the signal input terminal to the pull-up node; an output sub-circuit configured to output, to the signal output terminal, a pulse signal provided by the first clock signal terminal as a driving signal for scanning a gate line under control of the pull-up node; a reset sub-circuit configured to reset the pull-up node and the signal output terminal under control of the reset terminal; and an input selection sub-circuit configured to select a trigger signal to be provided to the signal input terminal according to voltage levels at first to third control terminals.

Shift register unit, gate line driving circuit and driving method thereof

A shift register circuit is disclosed that includes an input control circuit configured to set a first node at a first potential in response to an active pulse signal from a signal input terminal, an output control circuit configured to supply a clock signal from a first clock signal terminal to a signal output terminal in response to the first node being at the first potential, the first potential being less than a potential of the active pulse signal and greater than or equal to a potential for maintaining operation of the output control circuit, and a reset circuit configured to supply a reference voltage from a reference voltage terminal to the first node and the signal output terminal in response to a reset signal.

Shift register circuit and driving method thereof, gate driving circuit, and display device

The disclosure provides a shift register, a driving method for the shift register, a gate driving circuit and a display device. The shift register comprises an input component, a reset component, a node control module, a chamfering control component and an output component. By setting the chamfering control component and cooperation among the above five components, an amplitude of a scanning signal output by a driving signal output terminal is changed so as to generate a scanning signal with a chamfered waveform. When the scanning signal with the chamfered waveform is sequentially input to each pixel unit in a corresponding row by a corresponding gate line, a jump voltageVp on a pixel electrode of the pixel unit can be reduced, thereby mitigating phenomena such as flashing and image sticking of the display panel and improving the display quality of the display panel.

Shift register and driving method thereof, gate driving circuit, and display device

The present disclosure provides a shift register unit and a driving method thereof, a gate driving device and a display device. The shift register unit includes an input circuit, an output circuit, a pull-down circuit, a first pull-down control circuit, and a second pull-down control circuit, wherein the second pull-down control circuit is provided with a first pull-down compensation transistor and a second pull-down compensation transistor and connected to a second power supply voltage, to compensate a threshold voltage drift of a second pull-down control transistor in the second pull-down control circuit so as to avoid abnormality of the shift register unit which would be caused by the threshold voltage drift of the second pull-down control transistor driven by a long-time high voltage, thereby ensuring the stability of the shift register unit.

Shift register unit and driving method thereof, gate driving device and display device

The embodiments of the present disclosure provide a shift register, a method for driving the same, and a gate driving circuit. A pull-down sub-circuit of the shift register is under the control of a third clock signal terminal and a fourth clock signal terminal, wherein signals of the third clock signal terminal and the fourth clock signal terminal are mutually inverted signals, and signal periods of the third clock signal terminal and the fourth clock signal terminal are a half of a signal period of a first clock signal terminal or a second clock signal terminal.

Shift register, method for driving the same, and gate driving circuit

There are provided a shift register unit and a driving method thereof. The shift register unit includes: an input circuit, whose first terminal receives an input signal of the shift register unit, and second terminal is connected to a pull-up node, the input circuit being configured to output the input signal to the pull-up node; an output circuit, whose first terminal is connected to a clock signal terminal, second terminal is connected to the pull-up node, third terminal is connected to an output terminal of the shift register unit, the output circuit being configured to output a signal of the clock signal terminal to the output terminal under the control of the pull-up node; a pull-up node control circuit, and the pull-up node control circuit being configured to discharge the pull-up node through third power supply voltage terminal under the control of a first power supply voltage terminal.

Shift register unit and driving method thereof, gate driving apparatus and display apparatus

A thin film transistor device and a method for preparing the same, an array substrate and a display device are disclosed. The thin film transistor device includes a first thin film transistor and a second thin film transistor coupled with each other. A first electrode of the first thin film transistor, a second electrode of the second thin film transistor, and a connecting line therebetween which is configured to couple the first electrode and the second electrode, are formed in a same layer, with each end of the connecting line being connected between respective ends of the first electrode and the second electrode opposite to each other. In the thin film transistor device, the first electrode and the second electrode are spaced apart from each other by a concave portion which is recessed in a region therebetween.

Thin film transistor device and a method for preparing the same, array substrate and display device

A display substrate and a display device are disclosed. The display substrate includes an active area and a non-active area, and an afterimage removing device for adsorbing charged ions by forming a potential difference is provided in the non-active area.

Display substrate and display device

A sealant dispensing apparatus includes a rotatable injection cartridge for loading a sealant, having a plurality of outlets distributed from a periphery to a center with respect to a rotation axis of the injection cartridge; and a nozzle assembly in fluid communication with the injection cartridge, including at least two sub-nozzles arranged in a line. The outlet of the injection cartridge closer to the center of the injection cartridge is in communication with the sub-nozzle of the nozzle assembly closer to a first end of the line, and the outlet of the injection cartridge closer to the periphery of the injection cartridge is in communication with the sub-nozzle of the nozzle assembly closer to a second end of the line. The first end is opposite to the second end.

Growing community of inventors

Beijing, China

Huanyu Li