National Science Council

Chunghwa Picture Tubes, Ltd.

Other

Analog and Power Electronics Corp.

Allied Material Technology Corp.

Allied Material Corporation

National Yang Ming Chiao Tung University

Mosel Vitelic Corporation

Instrument Technology Research Center, National Applied Research Laboratories

Analog and Power Electrics Corp.

Huang-Chung Cheng

Ching-Hsiang Hsu

Dong-Yuan Goang

Chorng-Wei Liaw

Ming-Jang Lin

Zon-Zer Yu

Tian-Fure Shiue

Wei-Jye Lin

Hau-Luen Tien

Cheng-Tung Lin

Chi-Neng Mo

Ta-Chuan Liao

Ying-Hui Chen

Fu Gow Tarntair

Sheng-Kai Chen

Wei Kai Hong

Han-Wen Liu

Chia-Pin Lin

Yu-Chih Huang

Po-Yu Yang

Bo-Ting Chen

Ya-Hsiang Tai

Tzu-Kun Ku

Huai-An Li

Jyh-Shin Chen

Chun-Hsiang Fang

Huan-Ping Su

Shin-Chuan Chiang

Wen-Koi Lai

Ching-Wei Lin

Fu-Guo Tarntair

Roger Yen

Fu-Gom Tarntair

Edward Lu

Li-Jing Cheng

Der-Chi Shye

Cheng-Jer Yang

Fu-Kuo Tan-Tai

Meng-Wei Kuo

Nan-Ching Chen

Ming-Hua Shiao

Chi-Hung Chao

Pei-Fen Chou

Jiann-Shium Kao

Chih-Chong Wang

Bi-Shiou Chiou

Stewart Huang

A top-gate transistor array substrate includes a transparent substrate with a plane, an ion release layer, a pixel array, and a first insulating layer. The ion release layer is disposed on the transparent substrate and completely covers the plane. The pixel array is disposed on the ion release layer and includes a plurality of transistors and a plurality of pixel electrodes. Each of the transistors includes a source, a drain, a gate and a MOS (metal oxide semiconductor) layer. The drain, the source and the MOS layer are disposed on the ion release layer. The pixel electrodes are electrically connected to the drains respectively. The gate is disposed above the MOS layer. The first insulating layer is disposed between the MOS layers and the gates. The MOS layer contacts the ion release layer. The ion release layer can release a plurality of ions into the MOS layers.

Top-gate transistor array substrate

A manufacturing method of a thin film transistor is provided. An insulating pattern layer having at least one protrusion is formed on a substrate. At least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. The spacer and the amorphous semiconductor patterns are crystallized. The protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. A carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Manufacturing method of a thin film transistor

A thin film transistor and a manufacturing method thereof are provided. An insulating pattern layer having at least one protrusion is formed on a substrate. Afterwards, at least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. Later, the spacer and the amorphous semiconductor patterns are crystallized. Subsequently, the protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. Then, a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Thin film transistor and manufacturing method thereof

A microsensor fabricated with a ferroelectric material and a fabrication method therefor are provided. The microsensor includes a support, an insulating layer on the support, a first electrode on the insulating layer, a ferroelectric layer having at least a metal on the insulating layer and the first electrode, and at least a second electrode on the ferroelectric layer.

Microsensor with ferroelectric material and method for fabricating the same

An analog output buffer circuit for a flat panel display is provided for improving an output signal distortion. The circuit includes a transistor, a current source, an input capacitor, an upper switch, a lower switch, a first switch, a second switch and a third switch. In which, the transistor and the current source are electrically connected in series between a first power supply and a second power supply. The current source provides a compensatory current for the transistor when a leakage current occurs. The upper switch and the first switch are turned on during the first period, and the lower switch and the second switch are turn on during the second period, in which the second period is after the first period. Those switches eliminate the drawback of different voltage levels between the input signal and the output signal obtained from the output buffer circuit inputted by the input signal.

Analog output buffer circuit for flat panel display

A structure of an organic light-emitting TFT LCD and the method for making the same are disclosed. The invention provides a glass substrate on which a TFT IC is formed. A metal layer forms the top layer of the TFT. Afterwards, a white light-emitting organic material layer is deposited thereon. A cover layer is then used to flatten the surface of the organic material layer. Finally, a photo mask pattern and a color filter plate are formed, completing the assembly of the TFT LCD.

Structure of organic light-emitting TFT LCD and method of making the same

A power chip set for a switching mode power supply includes a high voltage chip and a control unit chip. The high voltage chip contains a switching power metal-oxide-semiconductor (MOS) transistor being turned on/off under control of an output signal from the control unit, and a junction field effect transistor (JFET) coupled between a drain of the switching power MOS transistor and a power terminal of the control unit to serve as a start up element for driving the control unit during initiation, in which the JFET has a negative threshold voltage and the absolute value thereof is equal to the voltage for driving the control unit. The JFET structure in the high voltage chip further includes a Zener diode for over voltage protection of the control unit. The high voltage chip further contains a current-sense power MOS transistor coupled with the drain of the switching power MOS transistor for detecting a drain current of the switching power MOS transistor. The chip set can be packaged into a power module.

Power chip set for a switching mode power supply having a device for providing a drive signal to a control unit upon startup

A structure of an organic light-emitting material TFT display and the method for making the same are disclosed. The invention provides a glass substrate formed with a plurality of TFTs thereon. A metal layer is formed on top of the TFT's. Afterwards, a planarized film layer covers the TFTs and the metal layer. The planarized film layer is formed with an organic light-emitting material pattern layer with red, blue and green colors. The organic light-emitting material pattern layer is in alignment with the TFT pattern. A transparent conductive glass layer is formed on top of the light-emitting material pattern layer. Finally, a photo mask pattern fills the light-emitting material pattern layer to prevent the mixture of different colors.

Method for making a structure of organic light-emitting material TFT display

A process of forming a field emission electrode for manufacturing a field emission array is provided. The process includes steps of (a) providing a substrate having a metal layer thereon, (b) forming a plurality of mask units on the metal layer and partially removing the metal layer uncovered by the mask units, (c) oxidizing a surface of the remained metal layer by an anodic oxidization method for forming a metal oxide layer thereon such that an upper portion of the unoxidized remained metal layer is in the shape of plural conoids, and (d) removing the remained mask units and the metal oxide layer. Alternatively, the process includes steps of (a) providing a substrate having a first metal layer thereon, (b) forming a plurality of mask units on the first metal layer and partially removing the first metal layer uncovered by the mask units, (c) oxidizing a surface of the remained first metal layer by an anodic oxidization method for forming a metal oxide layer thereon such that an upper portion of the unoxidized remained first metal layer is in the shape of plural cylinders, (d) forming a second metal layer on the metal oxide layer, and (e) removing the remained mask units.

Process for forming field emission electrode for manufacturing field emission array

A structure of an organic light-emitting material TFT LCD and the method for making the same are disclosed. The invention provides a glass substrate formed with a plurality of TFT's thereon. A metal layer is formed on top of the TFT's. Afterwards, a planarized film layer covers the TFT's and the metal layer. The planarized film layer is formed with an organic light-emitting material pattern layer with red, blue and green colors. The organic light-emitting material pattern layer is in alignment with the TFT pattern. A transparent conductive glass layer is formed on top of the light-emitting material pattern layer. Finally, a photo mask pattern fills the light-emitting material pattern layer to prevent the mixture of different colors.

Structure of organic light-emitting material TFT LCD and the method for making the same

The present invention provides a backlight module of a liquid crystal display (LCD), wherein a field emitting display is disposed at a backlight position of a liquid crystal panel module to be used as a backlight module of the display for providing the required backlight source. The field emitting display is composed of a plurality of carbon nanotubes to have a low operational voltage. The present invention has the characteristics of high brightness, power saving, super thinness, and capability of being used in rigorous environments.

Backlight module of liquid crystal display

A process for forming a film on a substrate having a field emitter is disclosed. The substrate and field emitter are cleaned by hydrogen plasma to remove the impurities. Next, a silicon carbide film is selectively formed over said field emitter. A negative bias voltage of about 150 V to about 300 V is applied to substrate for increasing the nucleation sites of said silicon carbide film. Afterward, the negative bias voltage is stopped so as to grow a carbon-containing film from said silicon carbide film.

Process for forming a film on a substrate having a field emitter

The present invention proposes a crystallization method of the poly-Si thin film in a thin film transistor. A substrate having an insulator layer is provided. An amorphous silicon layer or a micro-crystalline silicon layer having two thickness is first formed on the insulator layer. The region of thinner is defined as the channel region of the TFT, while the region of thicker can be defined as the source/drain regions of the TFT. Next, an excimer laser is used for crystallization. During the excimer laser irradiation, the amorphous silicon layer of thinner is completely melted, and the amorphous silicon layer of thicker is partially melted. The partially melted amorphous silicon layer is used as crystallization seeds. Through formation of the temperature gradient between the completely melted amorphous silicon layer and the partially melted amorphous silicon layer, longitudinal growth of silicon grains in the completely melted region will be performed to grow a poly-Si layer having good homogeneity and large grains.

Recrystallization method of polysilicon film in thin film transistor

A method for manufacturing a trench gate structure of a power metal-oxide-semiconductor field-effect transistor. A substrate is provided, which substrate has a epitaxial layer thereon, a base region formed in the epitaxial layer, a source region formed in a portion of the base region, a first dielectric layer on the base region and the source region, a second dielectric layer on the first dielectric layer and a trench penetrating through the second and the first dielectric layers, the source region and the base region and into the epitaxial layer. A third dielectric layer is formed on the bottom of the trench. A conformal gate oxide layer is formed in the trench. A conformal polysilicon layer is formed on the second dielectric layer and in the trench. A fourth dielectric layer is formed on the polysilicon layer to fill the trench. Portions of the fourth dielectric layer and the polysilicon layer are removed until the surfaces of the fourth dielectric layer and the polysilicon layer are substantially level with the surface of the base region.

Method of manufacturing trench gate structure

Growing community of inventors

Hsinchu, Taiwan

Huang-Chung Cheng