Cadence Design Systems, Inc.

Visualon, Inc.

Huan-Chih Tsai

Manish Pandey

Vivek Chickermane

Ankur Gupta

Patrick Gallagher

Pinhong Chen

Sandeep Bhatia

Qi Wang

Christina Chu

Steven Sharp

Chih-Chang Lin

Yonghao Chen

Bharat Chandramouli

Cheng Yi Huang

Chin-Yee Lin

Kei-Yong Khoo

Mitchell W Hines

Yang Cai

Cheng-Ta Hsieh

Xuejun Dong

Hyoheon Hong

Ming-Mao Chiang

Mei Fang

Yisheng Yao

Madan M Das

Rajat Arora

Yonghoa Chen

Yubao Li

A system for providing video playback comprises a processor configured to synchronize clocks on the plurality of devices to a standard time, provide target video playback positions to the plurality of devices, wherein target video playback positions are based at least in part on the timing information, provide one or more locators for video streams to the plurality of devices, monitor playback status for each of the plurality of devices, and for a device, determine whether the playback status for the device indicates that a selected bitrate is too low or too high or that the playback is fast or slow; in response to determining the selected bitrate is too low, indicate to select a higher bitrate for a device; and in response to determining the selected bitrate is too high, indicate to select a lower bitrate for the device.

Synchronized video player

A system for bitrate adaptation for low latency streaming includes an interface and a processor. The interface is configured to receive statistics, wherein the statistics comprise a server latency and a buffer level. The processor is configured to perform a set of checks based at least in part on the statistics, determine a streaming bitrate based at least in part on the set of checks, and indicate the streaming bitrate.

Bitrate adaptation for low latency streaming

A system of video stream transitioning includes an interface and a video stream transitioner. The interface is to receive an indication for changing from a current video stream to a target video stream. The video stream transitioner is to determine key frame information in the target video stream; determine a specific key frame to switch to; and provide a request for target video stream starting at the specific key frame.

Bitrate adaptation transitioning using key frames

A method of adding power control circuitry to a circuit design at each of an RTL and a netlist level comprising: demarcating multiple power domains within the circuit design; specifying multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains; and defining isolation behavior relative to respective power domains.

Method and mechanism for implementing electronic designs having power information specifications background

A method for implementing a single file format for power-related information for an IC comprising: providing a circuit design in at least one design file in a non-transitory computer readable storage device; providing power-related design information in a file in the computer readable storage device that is separate from the at least one design file and that specifies multiple power domains within the circuit design, each power domain including one or more design object instances from within the circuit design and that specifies multiple power modes each power mode corresponding to a different combination of on/off states of the multiple specified power domains and that specifies isolation behavior relative to respective power domains; and using a computer to add power control circuitry to the circuit design that implements the power domains and power modes and isolation behavior specified in the power specification information.

Method and system for verifying power specifications of a low power design are disclosed. The method includes receiving a register-transfer level (RTL) netlist representation of the low power design, receiving a power specification file for describing power requirements of the low power design and verifying the power specification file in accordance with the RTL netlist representation of the low power design. The method further includes verifying completeness, compatibility, and consistency of power requirements for the low power design.

Method and system for verifying power specifications of a low power design

Method and system for equivalence checking of a low power design are disclosed. The method includes receiving a register-transfer level (RTL) netlist representation of a circuit, receiving a power specification file for describing power requirements of the circuit, creating a low power gate netlist for representing a design implementation of the circuit using the RTL netlist and the power specification file, creating a reference low power RTL netlist for representing a design specification of the circuit using the RTL netlist and the power specification file, and performing equivalence checking between the low power gate netlist and the reference low power RTL netlist. The method further includes annotating low power information described in the power specification file into the reference low power RTL netlist, and creating low power logic in the reference low power RTL netlist.

Method and system for equivalence checking of a low power design

Growing community of inventors

Saratoga, CA, United States of America

Huan-Chih Tsai