Macronix International Co., Ltd.

International Business Machines Corporation

Huai-Yu Cheng

Hsiang-Lan Lung

I-Ting Kuo

Simone Raoux

Matthew Joseph Breitwisch

Yen-Hao Shih

Chieh-Fang Chen

Cheng-Wei Cheng

Chung H Lam

Chao-I Wu

Martin Michael Frank

Hiroyuki Miyazoe

Robert L Bruce

Matthew Joseph BrightSky

Wei-Chih Chien

SangBum Kim

Ming Hsiu Lee

Chiao-Wen Yeh

Che-Min Lin

Alexander Grun

A switching device is provided. The device includes a first electrode, a second electrode and a multi-layer ovonic threshold switch (OTS) between the first and second electrodes, the multi-layer OTS including a first layer and a second layer. The first layer and the second layer are different compositions, and the second layer includes germanium Ge and nitrogen N. The switching device can be thermally stable to temperatures over 600° C. Further, the switching device can be used in three-dimensional (3D) cross-point memory.

Multi-layer ovonic threshold switch (OTS) for switching devices and memory devices using the same

A method for mitigating moisture driven degradation of silicon doped chalcogenides includes placing a silicon doped chalcogenide composition in a process chamber, passivating dangling silicon bonds of the silicon doped chalcogenide composition by flooding the process chamber with forming gas or with hydrogen plasma, purging the forming gas or the hydrogen plasma from the process chamber, and removing the passivated silicon doped chalcogenide composition from the process chamber.

Mitigating moisture driven degradation of silicon doped chalcogenides

A phase-change material having specific SiOdoping into special Ge-rich GeSbTematerial is described. Integrated circuits using this phase-change material as memory elements in a memory array can pass the solder bonding criteria mentioned above, while exhibiting good set speeds and demonstrating good 10 year data retention characteristics. A memory cell described herein comprises a first electrode and a second electrode; and a memory element in electrical series between the first and second electrode. The memory element comprises a GeSbTephase change material with a silicon oxide additive, including a combination of elements having Ge in a range of 28 to 36 at %, Sb in a range of 10 to 20 at %, Te in a range of 25 to 40 at %, Si in a range of 5 to 10 at %, and O in a range of 12 to 23 at %.

High thermal stability SiOdoped GeSbTe materials suitable for embedded PCM application

A memory material and a memory device applying the same are provided. The memory material is a chalcogenide doped with carbon atom. The chalcogenide contains arsenic (As) atom, selenium (Se) atom, germanium (Ge) atom and silicon (Si) atom.

Memory material, and memory device applying the same

An ovonic threshold switch includes a first electrode, a second electrode, and an In-doped chalcogenide-based selector layer disposed between the first electrode and the second electrode, in which the In-doped chalcogenide-based selector layer has an In compound content of about 2 at. % to about 10 at. %. A memory cell including the In-doped chalcogenide-based selector layer is also provided.

Semiconductor device and memory cell

An ovonic threshold switch comprises a thin film composed essentially of Si, Ge, Se, As, and an amount of a chalcogen that is effective to passivate oxidation of the composition in the presence of water vapor, wherein the chalcogen is selected from the list consisting of: Te and S. In one or more embodiments, the chalcogen is S. In one or more embodiments, the chalcogen is Te. In one or more embodiments, the effective amount of the chalcogen is greater than 1% by atomic percent. In one or more embodiments, the effective amount of the chalcogen is less than 10% by atomic percent. In one or more embodiments, the composition of matter comprises 10% Si, 15% Ge, 40% Se, 30% As, and 5% chalcogen by atomic percent.

Suppressing oxidation of silicon germanium selenium arsenide material

A voltage sensitive switching device has a first electrode, a second electrode, and a switching layer between the first and second electrodes, comprising a composition of carbon C, arsenic As, selenium Se and germanium Ge thermally stable to temperatures over 400&#xb0; C. The switching device is used in 3D crosspoint memory.

C&#x2014;As&#x2014;Se&#x2014;Ge ovonic materials for selector devices and memory devices using same

A semiconductor device includes a first electrode, a second electrode, and an In-doped chalcogenide-based selector layer disposed between the first electrode and the second electrode, in which the In-doped chalcogenide-based selector layer has an In compound content of about 2 at. % to about 10 at. %. A memory cell including the In-doped chalcogenide-based selector layer is also provided.

A voltage sensitive switching device is described having a superlattice-like cell structure comprising layers of ovonic materials, such as chalcogenide alloys. Memory cells can include the switching device, such as can be utilized in a cross-point memory.

Superlattice-like switching devices

A voltage sensitive switching device has a first electrode, a second electrode, and a switching layer between the first and second electrodes, comprising a tellurium free, low germanium composition of arsenic As, selenium Se and germanium Ge. The switching device is used in 3D cross-point memory.

Te-free AsSeGe chalcogenides for selector devices and memory devices using same

Phase change memory materials in a dielectric-doped, antimony-rich GST family of materials which are antimony rich relative to GST-225, are described that have speed, retention and endurance characteristics suitable for storage class data storage A memory device includes an array of memory cells, where each memory cell includes a first electrode and a second electrode coupled to a memory element. The memory element comprises a body of phase change memory material that comprises a combination of Ge, Sb, and Te with a dielectric additive in amounts effective to provide a crystallization transition temperature greater than to 160&#xb0; C., greater that 170&#xb0; C. in some effective examples and greater than 190&#xb0; C. in other effective examples. A controller is coupled to the array, and configured to execute set operations and reset operations for memory cells in the array.

Dielectric doped, Sb-rich GST phase change memory

A Ga&#x2014;Sb&#x2014;Ge family of phase change memory materials is described, including GaSbGe, wherein a Ga atomic concentration x is within a range from 20% to 45%, a Sb atomic concentration y is within a range from 25% to 40% and a Ge atomic concentration z is within a range from 25% to 55%, is described wherein the material has a crystallization transition temperature Tgreater than 360&#xb0; C. Adding impurities including one or more element selected from silicon Si, carbon C, oxygen O and nitrogen N, can also increase the crystallization transition temperature Tto temperatures greater than 400&#xb0; C., and also reduce reset current.

GaSbGe phase change memory materials

A phase change storage device, Integrated Circuit (IC) chip including the devices and method of manufacturing IC chips with the devices. The device includes a phase change storage region with multiple phase change regions, e.g., two (2), of different phase change material serially-connected between said program/read line and a select device conduction terminal.

Phase change storage device with multiple serially connected storage regions

A phase change memory cell. The phase change memory cell includes a substrate and a phase change material. The phase change material is deposited on the substrate for performing a phase change function in the phase change memory cell. The phase change material is an alloy having a mass density change of less than three percent during a transition between an amorphous phase and a crystalline phase.

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Huai-Yu Cheng