Lg Philips Lcd Co., Inc.

Hu-Sung Kim

Yu-Ho Jung

Dong-Yeung Kwak

Yong-wan Kim

Soon-sung Yoo

Woo-Chae Lee

Duk-Jin Park

Kyo Ho Moon

A liquid crystal display device and a method of fabricating the same are disclosed in the present invention. More specifically, the method includes the steps forming a gate line on the first substrate sequentially forming a first insulating layer, an amorphous silicon layer, and a metal layer on the first substrate, patterning the metal layer to form a data line, forming a second insulating layer on the data line, patterning the second insulating layer and the amorphous silicon layer to form a passivation layer and an active layer, respectively, forming a pixel electrode at a pixel region defined by the gate and data lines, assembling the first substrate and the second substrate having a black matrix thereon, wherein the black matrix vertically overlaps at least one boundary line defined by different exposures during step-and-repeat exposure processes; and forming a liquid crystal layer between the first and second substrates.

Liquid crystal display device and method of fabricating the same

A TFT array substrate has a PAI pattern, and the PAI pattern has an over-etched portion of the pure amorphous silicon layer. This over-etched portion prevents a short between the pixel electrode and the pure amorphous silicon layer (i.e., the active layer). The over-etched portion also enables the aperture ratio to increase a gate line over a said substrate; a data line over the said substrate being perpendicular to the gate line; a passivation layer covering the data line, the passivation layer divided into a residual passivation layer and a etched passivation layer; a doped amorphous silicon layer formed under the data line and corresponding in size to the data line; a pure amorphous silicon layer formed under the doped amorphous silicon layer and having a over-etched portion in the peripheral portions, wherein the over-etched portion is over-etched from the edges of the residual passivation layer toward the inner side; an insulator layer under the pure amorphous silicon layer; a TFT formed near the crossing of the gate line and the data line; and a pixel electrode overlapping the data line and contacting the TFT.

Array substrate for use in LCD device and method of fabricating same

A liquid crystal display device includes a substrate, a thin film transistor disposed on the substrate, the thin film transistor including a gate electrode, a source electrode and a drain electrode, a gate line arranged in a first direction on the substrate, the gate line connected with the gate electrode of the thin film transistor, a gate insulation layer disposed on the substrate and covering the gate line and the gate electrode of the thin film transistor, an intrinsic semiconductor layer disposed on the gate insulation layer, an extrinsic semiconductor layer disposed on the intrinsic semiconductor layer, a data line arranged in a second direction substantially perpendicular to the first direction disposed on the extrinsic semiconductor layer, the data line connected to the source electrode of the thin film transistor, first and second dummy metal layers formed over the gate line and arranged on opposite sides of the data line, a passivation layer covering the data line, the source electrode, the drain electrode and the first and second dummy metal layers, and a pixel electrode located at a pixel region defined by an intersection of the gate line and the data line, the pixel electrode contacting the drain electrode of the thin film transistor.

Array substrate for a liquid crystal display and method for fabricating thereof

An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a first metal layer on a substrate, patterning the first metal layer to form a gate line, a gate electrode, a gate pad, a first shorting bar, and a second shorting bar, forming a gate insulation layer, a pure amorphous silicon layer, a doped amorphous silicon layer and a second metal layer to cover the patterned first metal layer, patterning the second metal layer and the doped amorphous silicon layer to form first, second and third through-holes and first and second grooves to expose a portion of the pure amorphous silicon layer, the first and second grooves creating an isolated portions of the second metal layer, forming a passivation layer to cover the patterned second metal layer, forming a source electrode, a drain electrode, a data line, a data pad, an insulating segment, and first, second and third contact holes, and forming a pixel electrode, a first connector and a second connector of a transparent conductive material.

Method for fabricating an array substrate for a liquid crystal display with an insulating stack made from TFT layers between crossed conductors

A method is disclosed for manufacturing an array substrate for use in a display device. The method includes providing a base substrate, forming a gate line on the base substrate using a first mask, forming sequentially a gate insulating layer, a semiconductor layer and a metal layer over the base substrate and the gate line, patterning the metal layer using a second mask to form a data line and a metal portion on the semiconductor layer, forming a protection layer over the data line, the metal portion and the semiconductor layer, forming a photoresist pattern on the protection layer over the data line using a third mask to define a first structure, applying at least two separate etching steps on the first structure to leave the gate insulating layer of a uniform thickness over the gate line and to pattern layers below the photoresist pattern, and forming a pixel electrode over a portion of the gate insulating layer on the gate line using a fourth mask.

Method of manufacturing array substrate for use in liquid crystal display device

Array substrate for a liquid crystal display and method for fabricating thereof with insulating stack made from TFT layers between crossed conductors

A TFT array substrate has a PAI pattern, and the PAI pattern has an over-etched portion of the pure amorphous silicon layer. This over-etched portion prevents a short between the pixel electrode and the pure amorphous silicon layer (i.e., the active layer). The over-etched portion also enables the aperture ratio to increase. a gate line over a said substrate; a data line over the said substrate being perpendicular to the gate line; a passivation layer covering the data line, the passivation layer divided into a residual passivation layer and a etched passivation layer; a doped amorphous silicon layer formed under the data line and corresponding in size to the data line; a pure amorphous silicon layer formed under the doped amorphous silicon layer and having a over-etched portion in the peripheral portions, wherein the over-etched portion is over-etched from the edges of the residual passivation layer toward the inner side; an insulator layer under the pure amorphous silicon layer; a TFT formed near the crossing of the gate line and the data line; and a pixel electrode overlapping the data line and contacting the TFT.

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Seoul, South Korea

Hu-Sung Kim