Raydium Semiconductor Corporation

Dazzo Technology Corporation

Hsuan-Hao Chien

Chih-Jen Hung

Shen-Xiang Lin

Li-Chieh Chen

A time multiplexing circuit applied to a DC-DC converting system including first to third NOR gates, first and second inverters, first and second D-type flip-flops, a NAND gate, an OR gate and an AND gate. The first NOR gate and second NOR gate receive the first and second pulse-width modulation signals respectively and output a boost state request signal and a buck-boost state request signal respectively. The first D-type flip-flop outputs a first time multiplex output signal and a first reverse time multiplex output signal. The second D-type flip-flop outputs a second time multiplex output signal and a second reverse time multiplex output signal. The third NOR gate outputs another first time multiplex output signal. The NAND gate outputs another second time multiplex output signal. The OR gate outputs a first reverse output signal. The AND gate outputs a second reverse output signal.

Time multiplexing circuit applied to DC-DC converting system

A soft-start control circuit includes first to third inverters, first to third comparators, first to fourth resistors, first to fourth D-type flip-flops and a NOR gate. The first comparator outputs a first trigger signal. The second comparator outputs a second trigger signal. The third comparator outputs a third trigger signal. The first D-type flip-flop outputs a first error amplification ready signal. The second D-type flip-flop outputs a second error amplification ready signal. The third D-type flip-flop outputs a high-level output voltage ready signal. The fourth D-type flip-flop outputs a low-level output voltage ready signal. The NOR gate receives an inverted signal of a high-level output voltage enable signal and the third trigger signal and outputs a high-level output voltage control signal to prevent an inrush current of the DC-DC conversion system during a startup process.

Soft-start control circuit applied to DC-DC converting system

A bias generation circuit coupled to a display panel is disclosed. The bias generation circuit includes a linear regulator, a charge pump and a synchronous dual mode boost DC-DC converter. The linear regulator and the charge pump are coupled to the display panel respectively. The synchronous dual mode boost DC-DC converter is selectively operated in a pulse width modulation mode or a pulse frequency modulation mode according to a control signal. In the pulse width modulation mode, the synchronous dual mode boost DC-DC converter controls the linear regulator to generate a first voltage signal to the display panel. In the pulse frequency modulation mode, the synchronous dual mode boost DC-DC converter controls the charge pump to generate a second voltage signal to the display panel.

Bias generation circuit and synchronous dual mode boost DC-DC converter therof

A LED driving apparatus including a power converter, a judging module and a control module is disclosed. The power converter and the judging module are coupled to at least one LED respectively. The control module is coupled to the judging module. The control module includes a current source and a transconductance amplifier. The current source is coupled to an output terminal of the transconductance amplifier. The power converter converts an input voltage into an output voltage and transmits the output voltage to the at least one LED. The judging module judges whether a LED current is changed from a first LED current value to a second LED current value. If yes, the judging module generates a judging signal to the control module. The control module changes a current value of the current source and a transconductance of the transconductance amplifier.

Light-emitting diode driving apparatus and operating method thereof

A charge pump and operating method thereof are disclosed. The charge pump includes a first capacitor to a third capacitor and a first switch to a tenth switch. The charge pump is used to receive an input voltage and provide an output voltage to a load capacitor. When the charge pump is operated in a first mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (&#x2212;&#xbd;) times the input voltage. When the charge pump is operated in a second mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (&#x2212;&#x2154;) times the input voltage.

Charge pump and operating method thereof

In a LED driver, a dimming control circuit receives a PWM signal and a clock signal and outputs a dimming signal and a sampling signal. A turn-on time of sampling signal is shorter than a cycle of clock signal. A first error amplifier receives a feedback voltage, a reference voltage and a dimming signal and outputs a compensating voltage. A second error amplifier receives the compensating voltage and a ramp signal and outputs a pulse voltage. A driving controller receives the dimming signal and pulse voltage and outputs a control signal. An output stage receives the control signal and an input voltage and generates an output voltage to LED strings. A minimum voltage selecting unit selects a minimum LED voltage. The first error amplifier receives the minimum LED voltage through the selectively conducted switch unit controlled by the sampling signal.

Growing community of inventors

Taipei, Taiwan

Hsuan-Hao Chien