Sun Microsystems, Inc.

Hsiu-Nien Chen

Peter F Lai

Yongjun Zhang

Peter L Fu

Shobhit Malik

Sachin Chopra

Von-Kyoung Kim

Kong-Fal Woo

Bob Yu

Srirarm Satakopan

Wai Kit Leong

A method and apparatus for enforcing design for manufacturability rules on a circuit layout is provided. A tool receives a first set of design rules, to be applied to the circuit layout, which must be followed. The tool also receives a second set of design rules, to be to the circuit layout, which may be followed. The first set of design rules may be supplied by an employer or followed by a design team, and the second set of design rules may correspond to a set of design for manufacturability (DFM) rules. The tool applies the first set of design rules and the second set of design rules to the circuit layout to generate a revised circuit layout. The revised circuit layout conforms to each of the first set of design rules, and conforms to as many design rules in the second set of design rules as possible.

Systematic approach for applying recommended rules on a circuit layout

Method and system for providing a netlist driven integrated router in a non-netlist driven environment for microprocessor designs includes retrieving top level netlist for the existing microprocessor design from the top level database and the design parameters for the new microprocessor design, and translating these netlist and design parameters at the front end so that the resulting data can be provided to an integrated router which is configured to generate re-routes for the new microprocessor design based on the top level netlist and the design parameters, where the generated re-routes are provided to a back end for translating the re-routes to new top level netlist and merging the new top level netlist with the existing top level netlist database.

Method and system for providing a netlist driven integrated router in a non-netlist driven environment

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San Jose, CA, United States of America

Hsiu-Nien Chen