Jiangsu Advanced Memory Technology Co., Ltd.

Siloam Holdings Co., Ltd.

Hsiu-Chun Tsai

Jui-Jen Wu

Toshio Sunaga

A memory device includes a memory group and a control circuit. The memory group includes several memory banks. The control circuit is coupled to the memory group. The control circuit includes a tri-state logic enable circuit and an address decoding circuit. The tri-state logic enable circuit is configured to temporarily store several temporarily stored address signals, to output the several temporarily stored address signals according to a synchronization signal, to decode the several temporarily stored address signals to generate an enable signal, and to transmit the enable signal to one of the several memory banks. The address decoding circuit is configured to decode the several temporarily stored address signals to drive the one of the several memory banks.

Growing community of inventors

Hsinchu County, Taiwan

Hsiu-Chun Tsai