E Ink Holdings Inc.

Hsing-Yi Wu

Ted-Hong Shinn

Chia-Chun Yeh

Kuo-Hsing Cheng

Kuo-Yen Chang

Chih-Hsiang Yang

Wei-Tsung Chen

Wei-Chou Lan

Chin-Wen Lin

Chuan-I Huang

An electronic device package includes a carrying board, an electronic device, a first insulating layer, and a barrier layer. The carrying board includes a central area, an inner edge area, and an outer edge area. The inner edge area is located between the central area and the outer edge area. The electronic device is located in the central area. The first insulating layer is located on the carrying board and overlapped with the electronic device and extends from the central area to the inner edge area. The barrier layer is located on the carrying board. Here, the barrier layer includes a sidewall contact portion and an extending portion. The sidewall contact portion surrounds a side surface of the first insulating layer, and the extending portion extends from the sidewall contact portion to the outer edge area in a direction away from the first insulating layer.

Electronic device package

A pixel structure includes data lines disposed along a first direction, scan lines disposed along a second direction and pixel units periodically disposed along the first and the second directions. In a first pixel unit, a first switch element is coupled to a first scan line and a first data line, the second switch element is coupled to the first scan line, and a third switch element is coupled to the first scan line. In a second pixel unit, a fourth switch element is coupled to a second scan line, the first data line and the second switch element, and a fifth switch element is electrically coupled to the second scan line and the third switch element. In a third pixel unit, a sixth switch element is coupled to a third scan line, the first data line and the fifth switch element.

Pixel structure and driving method

An organic semiconductor device includes a carrier, a source, a drain, an organic semiconductor single-crystalline channel layer, an organic insulation layer and a gate. The source and the drain are disposed on an upper surface of the carrier. The source and the drain are disposed in parallel and a portion of the carrier is exposed between the source and the drain. The organic semiconductor single-crystalline channel layer is disposed on the upper surface of the carrier and covers a portion of the source, a portion of the drain and the portion of the carrier exposed by the source and the drain. The organic insulation layer covers the carrier, the source, the drain and the organic semiconductor single-crystalline channel layer. The gate is disposed on the organic insulation layer and corresponds to a position of the portion of the carrier exposed by the source and the drain.

Organic semiconductor device and manufacturing method thereof

A compensation method for a light emitting diode (LED) circuit including a first transistor, a second transistor, a capacitor, and a LED is illustrated. A first end as a control end of the first transistor is connected to one end of the second transistor and the capacitor, and a second end of the first transistor is connected to the LED. A width to length (W/L) ratio of the second transistor is less than one. An initial control voltage is applied to a control end of the second transistor, and the current output voltage of the LED is correspondingly measured. If a difference between the current output voltage and an initial output voltage exceeds a predetermined value, a compensation voltage, which is a summation of the initial control voltage and the difference, is applied to the control end of the second transistor.

Compensation method and apparatus for light emitting diode circuit

A transistor and a manufacturing method thereof are provided. The transistor includes a first gate, a second gate disposed on one side of the first gate, a first semiconductor layer, a second semiconductor layer, an oxide layer, a first insulation layer, a second insulation layer, a source, and a drain. The first semiconductor layer is disposed between the first and second gates; the second semiconductor layer is disposed between the first semiconductor layer and the second gate. The oxide layer is disposed between the first semiconductor layer and the second semiconductor layer. The first insulation layer is disposed between the first gate and the first semiconductor layer; the second insulation layer is disposed between the second gate and the second semiconductor layer. The source and the drain are disposed between the first insulation layer and the second insulation layer and respectively disposed on opposite sides of the oxide layer.

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Hsinchu, Taiwan

Hsing-Yi Wu