Taiwan Semiconductor Manufacturing Comp. Ltd.

Hsing-Leo Tsai

Po-Hsiang Huang

Wen-Sheh Huang

Yu-Hsiang Chen

Chia-En Huang

Chia-en Huang

a transistor and an interconnect structure disposed over the transistor. The interconnect structure includes a first dielectric layer, a first conductive feature in the first dielectric layer, a first etch stop layer (ESL) disposed over the first dielectric layer and the first conductive feature, a dielectric feature disposed in the first ESL, an electrode disposed over the dielectric feature, and a second ESL disposed on the first ESL and the electrode.

Back-end-of-line devices

A transistor and an interconnect structure disposed over the transistor. The interconnect structure includes a first dielectric layer, a first conductive feature in the first dielectric layer, a first etch stop layer (ESL) disposed over the first dielectric layer and the first conductive feature, a dielectric feature disposed in the first ESL, an electrode disposed over the dielectric feature, and a second ESL disposed on the first ESL and the electrode.

Growing community of inventors

Hsinchu, Taiwan

Hsing-Leo Tsai