Taiwan Semiconductor Manufacturing Comp. Ltd.

Hsing-Hsiang Wang

Huan-Just Lin

Jiann-Horng Lin

Sin-Yi Yang

Han-Ting Lin

Chen-Jung Wang

Yu-Feng Yin

Kun-Yi Li

Meng-Chieh Wen

Cheng-Yi Huang

An-Shen Chang

Lan-Hsin Chiang

Yu-Hsiang Lin

Yin-Hao Wu

Lin-Ting Lin

Wei-Da Chen

P Y Chiu

Miau-Shing Tsai

Tom Peng

Ching-Horng Chen

A semiconductor structure and a method for forming a semiconductor structure are provided. A substrate having a cell region and a mark region is received. A dielectric layer is etched to expose a conductive line in the cell region and form a trench in the mark region. A conductive layer is formed over the cell region and in the trench. The conductive layer is etched to form a bottom electrode via in the cell region and a first mark layer in the trench.

Memory device and method for forming thereof

A magnetic tunnel junction (MTJ) memory cell comprising a connection via structure, a bottom electrode disposed on the connection via structure, a memory material stack disposed on the bottom electrode, and a conductive contact structure disposed on the memory material stack, in which a bottom surface of the conductive contact structure is in direct contact with a memory material layer of the memory material stack.

Memory cell with low resistance top electrode contact and methods for forming the same

In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.

Metal etching with in situ plasma ashing

A method for forming a memory device structure is provided. The method includes providing a substrate, a first dielectric layer, a conductive via, a magnetic tunnel junction cell, a first etch stop layer, and a first spacer layer. The substrate has a first region and a second region, the first dielectric layer is over the substrate, the conductive via passes through the first dielectric layer over the first region. The method includes removing the first etch stop layer, which is not covered by the first spacer layer. The method includes removing the first dielectric layer, which is not covered by the first etch stop layer.

Memory device structure and method for forming the same

Growing community of inventors

Hsinchu, Taiwan

Hsing-Hsiang Wang