Advanced Semiconductor Engineering, Inc.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Hsin-Ying Ho

Hsun-Wei Chan

Lu-Ming Lai

Kei-Wei Chen

Ying-Chung Chen

Kao-Feng Liao

Shih-Chieh Tang

Fang-I Chih

Chia-Jung Hsu

Hui-Chi Huang

Chun-Hao Kung

Ching-Hsiang Tsai

Peng-Chung Jangjian

Tung-Kai Chen

Chun-Wen Hsiao

Sheng-Chao Chuang

Chun-Chieh Lin

Liang-Guang Chen

Chih Hung Chen

Chih-Chieh Chang

Fu-Ming Huang

Ting-Hsun Chang

Chang Chin Tsai

Ji James Cui

Michael Yen

Yi Wen Chiang

Kuang-Hsiung Chen

Chi Sheng Tseng

Cheng-Ling Huang

Mei-Yi Wu

Tsung-Yu Lin

Chung-Wei Hsu

Chia Yun Hsu

Chun-Han Chen

Chih-chieh Chang

Hui-chi Huang

Wei Ling Ma

An optical system and a method of manufacturing an optical system are provided. The optical system includes a carrier, a light emitter, a light receiver, a block structure and an encapsulant. The light emitter is disposed on the carrier. The light receiver is disposed on the carrier and physically spaced apart from the light emitter. The light receiver has a light detecting area. The block structure is disposed on the carrier. The encapsulant is disposed on the carrier and covers the light emitter, the light receiver and the block structure. The encapsulant has a recess over the block structure.

Optical system and method of manufacturing the same

A planarization method includes: providing a substrate, wherein the substrate includes a first region and a second region having different degrees of hydrophobicity or hydrophilicity, the second region covering an upper surface of the first region; polishing the substrate with a polishing slurry until the upper surface of the first region is exposed; and continuing polishing and performing a surface treatment by the polishing slurry to adjust the degree of hydrophobicity or hydrophilicity of at least one of the first region and the second region. The polishing slurry and the upper surface of the second region have a first contact angle, and the polishing slurry and the upper surface of the first region have a second contact angle. The surface treatment keeps a contact angle difference between the first contact angle and the second contact angle being equal to or less than 30 degrees during the polishing.

Chemical mechanical polishing method

A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Chemical mechanical planarization tool

An optical assembly includes a light-emitting device, a partition structure and a cover. The partition structure defines a first space for accommodating the light-emitting device. The cover is disposed over the partition structure. The cover has a first surface facing the partition structure and a second surface opposite to the first surface. A light emitted by the light-emitting device forms a first irradiance pattern projected on the second surface of the cover, and the first irradiance pattern includes a first dark zone traversing the first irradiance pattern.

Optical assembly that generates distinctive irradiance pattern of light

An optical module includes an image sensor and micro lens array. The image sensor has at least one group of pixels. The micro lens array is disposed on the image sensor. The at least one group of pixels is shifted from the micro lens array in a first direction from a top view perspective.

Optical module

A semiconductor device package includes a light-emitting device, a diffuser structure, a first optical sensor, and a second optical sensor. The light-emitting device has a light-emitting surface. The diffuser structure is above the light-emitting surface of the light-emitting device. The first optical sensor is disposed below the diffuser structure, and the first optical sensor is configured to detect a first reflected light reflected by the diffuser structure. The second optical sensor is disposed below the diffuser structure, and the second optical sensor is configured to detect a second reflected light reflected by the diffuser structure.

Semiconductor device package

A semiconductor device package includes a substrate, a partition structure and a polymer film. The partition structure is disposed on the substrate and defines a space for accommodating a semiconductor device. The polymer film is adjacent to a side of the partition structure distal to the substrate. A first side surface of the polymer film substantially aligns with a first side surface of the partition structure.

Semiconductor device package and method of manufacturing the same

A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.

A semiconductor device package includes a carrier, a die, an encapsulation layer and a thickness controlling component. The die is disposed on the carrier, wherein the die includes a first surface. The encapsulation layer is disposed on the carrier, and encapsulates a portion of the first surface of the die. The encapsulation layer defines a space exposing another portion of the first surface of the die. The thickness controlling component is disposed in the space.

Semiconductor device package and method for manufacturing the same

An optical sensor module includes: (1) a lid defining a first chamber and a second chamber isolated from the first chamber; (2) a light emitting component disposed within the first chamber; and (3) a light sensing component disposed within the second chamber; wherein the lid includes a capping substrate and a top of the first chamber and a top of the second chamber are demarcated by the capping substrate, wherein the capping substrate defines a first penetrating hole at the top of the first chamber and a first runner connecting a side wall of the first penetrating hole, and wherein a first lens or a first transmissive panel is formed or disposed in the first penetrating hole and has an extension formed or disposed in the first runner connecting the side wall of the first penetrating hole.

Optical sensor module and method for manufacturing the same

A multiple metallization scheme in conductive features of a device uses ion implantation in a first metal layer to make a portion of the first metal layer soluble to a wet cleaning agent. The soluble portion may then be removed by a wet cleaning process and a subsequent second metal layer deposited over the first metal layer. An additional layer may be formed by a second ion implantation in the second metal layer may be used to make a controllable portion of the second metal layer soluble to a wet cleaning agent. The soluble portion of the second metal layer may be removed by a wet cleaning process. The process of depositing metal layers, implanting ions, and removing soluble portions, may be repeated until a desired number of metal layers are provided.

Multiple metallization scheme

A device includes a semiconductor fin protruding from a substrate, a first gate stack over the semiconductor fin and a second gate stack over the semiconductor fin, a first source/drain region in the semiconductor fin adjacent the first gate stack and a second source/drain region in the semiconductor fin adjacent the second gate stack, a first layer of a first dielectric material on the first gate stack and a second layer of the first dielectric material on the second gate stack, a first source/drain contact on the first source/drain region and adjacent the first gate stack, a first layer of a second dielectric material on a top surface of the first source/drain contact, and a second source/drain contact on the second source/drain region and adjacent the second gate stack, wherein the top surface of the second source/drain contact is free of the second dielectric material.

FinFET contacts and method forming same

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Kaohsiung, Taiwan

Hsin-Ying Ho