Apple Inc.

Hsin-Tung A Yu

Dean M Drako

A circuit for providing the function of a dual port FIFO circuit including a first bank of single port random access memory, a second bank of single port random access memory, apparatus for sequentially writing every other piece of sequential data to an alternate one of the first and second [memory] banks of single port memory, and apparatus for simultaneously reading the earliest written piece of sequential data from the one [each] of the first and second [memory] banks of single port memory not being written during the period data is being written to the other of the [memory] banks of single port memory. By using two banks of single port memory, the cost of dual port memory typically used for a FIFO circuit is substantially reduced.

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Palo Alto, CA, United States of America

Hsin-Tung A Yu