Macronix International Co., Ltd.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Inventec Corp.

Inventec (pudong) Technology Corporation

Chang Gung University

Hsin-Liang Chen

Wing-Chor Chan

Shyi-Yuan Wu

Wen-Chih Wang

Cheng-Chieh Chen

Chih-Ling Hung

Yen-Cheng Lin

Li-Jui Chen

Chien-Wen Chu

Shuo-Lun Tu

Jeng-Yann Tsay

Po-Chung Cheng

Keith Kuang-Kuo Koai

Chia-Chen Lu

Ming-Hung Shih

Ying-Chieh Tsai

Yung-yao Lee

Shih-Kuo Liu

Tzu-Yi Hung

Chia-hung Liao

Hung-ting Lin

Yi-Ming Yeh

Henry Yee-Shian Tong

Louis Chun-Lin Chang

Yi-Chun Shih

Chun-Ying Yang

Jhan-Hong Yeh

Henry Yee Shian Tong

Chieh-Tsai Wu

Shih Tseng Lee

Min-Hsin Wu

Wen-Ching Tung

Shou-Lun Tu

Chan Wing Chor

Wen-Chung Teng

The present disclosure provides a method for fabricating a semiconductor structure, including placing a wafer on a chuck, wherein the wafer is surrounded by a focus ring, the focus ring is supported by a first actuator, wherein the first actuator is in a cavity defined by the chuck and the edge ring, wherein the first actuator includes an outer ring disposed in the cavity, a piezoelectric layer apart from a top surface of the cavity, wherein an edge of the piezoelectric layer is fixed by the outer ring, and an inner ring disposed in the chamber at a center portion of the piezoelectric layer, performing plasma etch on a surface of the wafer, and controlling a distance between a gas distribution plate and a top surface of the focus ring to be less than a threshold value by the first actuator.

Apparatus for fabricating a semiconductor structure and method of fabricating a semiconductor structure

A method for forming a layer includes following operations. A workpiece is received in an apparatus for deposition. The apparatus for deposition includes a chamber, a pedestal disposed in the chamber to accommodate the workpiece, and a ring disposed on the pedestal. The ring includes a ring body having a first top surface and a second top surface and a barrier structure disposed between the first top surface and the second top surface. A vertical distance is defined by a top surface of the barrier structure and a top surface of the workpiece. The vertical distance is between approximately 0 mm and approximately 50 mm. A target disposed in the apparatus for deposition is sputtered. A sputtered material is deposited onto a top surface of the workpiece to form a layer. The barrier structure alters an electrical density distribution during the depositing the sputter material.

Method for forming layer

An apparatus for PVD is provided. The apparatus includes a chamber, a pedestal disposed in the chamber to accommodate a wafer, and a ring. The ring includes a ring body having a first top surface and a second top surface, and a barrier structure disposed between the first top surface and the second top surface. The barrier structure can further include at least a first portion and a second portion separated from each other. The second vertical distance is equal to or greater than the first vertical distance.

Apparatus for physical vapor deposition and method for forming a layer

The present disclosure provides an apparatus for fabricating a semiconductor structure, including a chuck, an edge ring surrounding the chuck, wherein the edge ring comprises a cavity, a focus ring adjacent to an edge of the chuck and over the edge ring, and a first actuator in the cavity of the edge ring and engaging with the focus ring.

In a method of diagnosing an RF generator of a laser produced plasma extreme ultra violet (LPP EUV) radiation source apparatus, a testing system is connected to the RF generator of the LPP EUV radiation source apparatus. An output power is measured by the testing system with changing an input power of the RF generator. Using a computer system, the measured output power is analyzed. Based on the analyzed measured output power, whether the RF generator is operating properly is determined.

EUV light source and apparatus for lithography

A device includes a laser source, an amplifier, an optical sensor and a spectrometer. The laser source is configured to produce a seed laser beam. The amplifier includes gain medium and a discharging unit. The discharging unit is configured to pump the gain medium for amplifying power of the seed laser beam. The optical sensor is coupled to the amplifier and configured for sensing an optical emission generated in the amplifier while the gain medium is discharging. The spectrometer is coupled with the optical sensor and configured to measure a spectrum of the optical emission.

Laser source device, extreme ultraviolet lithography device and method

Laser source device and extreme ultraviolet lithography device

An electrostatic discharge protection device includes: a semiconductor substrate; an N-type doped well on the substrate, the N-type doped well including a first N+ region and a first P+ region; a P-type doped well on the substrate, the P-type doped well including a second N+ region, a third N+ region, and a second P+ region between the second N+ region and the third N+ region; and a first contact positioned above a surface of the N-type doped well between the first N+ region and the first P+ region.

Electrostatic discharge protection device

Provided is a semiconductor device including a gate structure, a first doped region of a first conductivity type, a plurality of second doped regions of a second conductivity type, a third doped region of the first conductivity type, and a plurality of fourth doped regions of the second conductivity type. The gate structure is located on a substrate. The first doped region is located in the substrate on a first side of the gate structure. The second doped regions are located in the first doped region. The second doped regions are separated from each other. The third doped region is located in the substrate on a second side of the gate structure. The fourth doped regions are located in the third doped region. The fourth doped regions are separated from each other. The second doped regions and the fourth doped regions are disposed alternately.

Semiconductor device

Methods, circuits, devices, and systems for high voltage electrostatic discharge (ESD) protection are provided. An example ESD protection device includes: a base well of a first dopant type on a substrate, a first well of the first dopant type in the base well, a second well of a second dopant type in the base well, a first highly doped region of the first dopant type and a second highly doped region of the second dopant type in the first well, a third highly doped region of the second dopant type in the second well, and a fourth highly doped region of the first dopant type in the third highly doped region. The first highly doped region and the second highly doped region are coupled to a first voltage terminal, and the third highly doped region and the fourth highly doped region are coupled to a second voltage terminal.

High voltage electrostatic discharge (ESD) protection

An electronic device includes a casing, a first power housing and a second power housing. The casing is equipped with a main board. The first power housing is disposed in the casing. The first power housing has a plurality of engaging portions. The second power housing has a plurality of engaging grooves. Each of the engaging grooves is corresponding to one of the engaging portions. Each of the engaging grooves is L-shaped and has an opening. When the second power housing is disposed on the first power housing and the engaging portion enters the engaging groove through the opening, the second power housing is capable of moving with respect to the first power housing in a horizontal direction, such that the engaging portion is engaged with the engaging groove.

Electronic device

An assembly mechanism and a server system therewith are disclosed. The server system includes a casing, a first module and a second module. The first module is installed inside the casing. The second module is selectively installed inside the casing. The assembly mechanism includes a frame mechanism, a tray, a first fixing member and a handle member. The frame mechanism is disposed around the first module. The tray is combined with the second module and supports the second module above the first module cooperatively with the frame mechanism. The first fixing member is fixed on the frame mechanism. The handle member is pivoted to the tray. The handle member activates the tray to approach the first module as being rotated in a first direction. The handle member activates the tray to separate from the first module as being rotated in a second direction.

Assembly mechanism adapted to a server system and server system therewith

A manufacturing method of a semiconductor structure provides a substrate. A well having a first conductive type and a well having a second conductive type are formed in the substrate, respectively. A body region is formed in the well having the second conductive type. A first doped region and a second doped region are formed in the well having the first conductive type and the body region respectively. The first and second doped regions have same polarities, and a dopant concentration of the second doped region is higher than that of the first doped region. A third doped region is formed in the well having the second conductive type and between the first and second doped regions. The third and first doped regions have reverse polarities. A first field plate is formed on a surface region between the second and third doped regions.

Manufacturing method of semiconductor structure

A semiconductor device includes high-voltage (HV) and low-voltage (LV) MOS's formed in a substrate. The HV MOS includes a first semiconductor region having a first-type conductivity and a first doping level, a second semiconductor region having the first-type conductivity and a second doping level lower than the first doping level, a third semiconductor region having a second-type conductivity, and a fourth semiconductor region having the first-type conductivity. The first, second, third, and fourth semiconductor regions are arranged along a first direction, and are drain, drift, channel, and source regions, respectively, of the HV MOS. The LV MOS includes the fourth semiconductor region, a fifth semiconductor region having the second-type conductivity, and a sixth semiconductor region having the first-type conductivity. The fourth, fifth, and sixth semiconductor regions are arranged along a second direction different from the first direction, and are drain, channel, and source regions, respectively, of the LV MOS.

Semiconductor ESD protection device

A semiconductor device formed in a substrate, including a first region, a second region formed over the first region, a third region, a fourth region formed over the third region, and a fifth region formed over the first region and contacting the second region. The first, second, and fourth regions have a first-type conductivity, and constitute drain region, drain electrode, and source region of a metal-on-semiconductor (MOS) structure. The second region has a higher doping level than the first region. The third region has a second-type conductivity and constitutes channel and body regions of the MOS structure. The fifth region has the second-type conductivity and constitutes an emitter region of a bipolar junction (BJ) structure. The second and third regions constitute base and collector regions of the BJ structure.

Growing community of inventors

Taipei, Taiwan

Hsin-Liang Chen