TSMC Solid State Lighting Ltd.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Epistar Corporation

Skymedi Corporation

Hsin-Hsien Wu

Chyi Shyuan Chern

Chun-Lin Louis Chang

Hung-Yi Kuo

Zin-Chang Wei

Yung-Chang Chen

Chyi-Shyuan Chern

Fu-Wen Liu

Chi-Ming Yang

Ching-Wen Hsiao

Jong-I Mou

Chih-Kuang Yu

Jun-Lin Yeh

Jih-Jse Lin

Kuang-Huan Hsu

Ming-Yu Fan

Huai-En Lai

Tsun-Kai Ko

Hsing-Kuo Hsia

Yen-Chih Chen

Cheng-Hsiung Yen

Chun-Kai Wang

Jui-Yi Chu

Jo-Fei Wang

Yu-Pin Hsu

Yu-Yao Lin

Ming Shing Lee

Andy Wu

Chien-Yuan Tseng

Chun-Ta Yu

Shih-Chun Ling

Hsiao-Wen Lee

Yi-Chieh Lin

Chih-Ming Ke

Schang-Jing Hon

Jo Fei Wang

Cheng-Ta Kuo

Yu-Sheng Tang

Ching-Hua Chiu

Tien-Ming Lin

Chih-Nan Yen

Fu-Ja Shone

Yung-Li Ji

Ming-Hua Lo

Shang-Yu Tsai

Yu-Mao Kao

Hung-Bin Lin

Wei-Yu Yen

Li-Chao Yin

Yung-Hsin Yang

Ming-Shing Lee

Chu-Ching Tsai

In a method, a structure including two or more materials having different coefficients of thermal expansion is prepared, and the structure is subjected to a cryogenic treatment. In one or more of the foregoing and following embodiments, the structure includes a semiconductor wafer and one or more layers are formed on the semiconductor wafer.

Method of manufacturing semiconductor devices

An apparatus and a method for controlling critical dimension (CD) of a circuit is provided. An apparatus includes a controller for receiving CD measurements at respective locations in a circuit pattern in an etched film on a first substrate and a single wafer chamber for forming a second film of the film material on a second substrate. The single wafer chamber is responsive to a signal from the controller to locally adjust a thickness of the second film based on the measured CD's. A method provides for etching a circuit pattern of a film on a first substrate, measuring CD's of the circuit pattern, adjusting a single wafer chamber to form a second film on a second semiconductor substrate based on the measured CD. The second film thickness is locally adjusted based on the measured CD's.

Multi-zone temperature control for semiconductor wafer

This application discloses a light-emitting diode comprising a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and a semiconductor contact layer on the second semiconductor layer. The second semiconductor layer comprises a first sub-layer and a second sub-layer formed above the first sub-layer, wherein the material of the second sub-layer comprises AlGaN (0&#x3c;x&#x3c;1) and the second sub-layer has a surface comprising a structure of irregularly distributed holes.

Light-emitting diode

A device includes: a substrate; and a doped III-V compound layer disposed over the substrate; wherein: the doped III-V compound layer includes an upper boundary; the upper boundary has a micro-roughened texture and a macro-roughened texture where the micro-roughened texture located on; and the upper boundary includes dopant ions that are not present in a remainder of the doped III-V compound layer underneath the upper boundary.

Light emitting diode

The present disclosure involves a method of fabricating a light-emitting diode (LED) wafer. The method first determines a target surface morphology for the LED wafer. The target surface morphology yields a maximum light output for LEDs on the LED wafer. The LED wafer is etched to form a roughened wafer surface. Thereafter, using a laser scanning microscope, the method investigates an actual surface morphology of the LED wafer. Afterwards, if the actual surface morphology differs from the target surface morphology beyond an acceptable limit, the method repeats the etching step one or more times. The etching is repeated by adjusting one or more etching parameters.

Optimizing light extraction efficiency for an LED wafer

A plurality of conductive pads are disposed on a substrate. A plurality of semiconductor dies are each disposed on a respective one of the conductive pads. A mold device is positioned over the substrate. The mold device contains a plurality of recesses that are each configured to accommodate a respective one of the semiconductor dies underneath.

Method and apparatus for accurate die-to-wafer bonding

A method includes forming an opening in a substrate, and the opening completely extends through the substrate. A recast material is formed on sidewalls of the substrate exposed by the opening. A first chemical is applied in the opening to remove the recast material, wherein a residue of the first chemical remains on portions of the sidewalls after the applying of the first chemical. Moreover, A second chemical is applied in the opening to remove the residue of the first chemical, and the second chemical is different from the first chemical.

Methods of forming through silicon via openings

A method for forming a layer of material on a semiconductor wafer using a semiconductor furnace that includes a thermal reaction chamber having a heating system having a plurality of rotatable heaters for providing a heating zone with uniform temperature profile is provided. The method minimizes temperature variations within the thermal reaction chamber and promotes uniform thickness of the film deposited on the wafers.

Rotatable and tunable heaters for semiconductor furnace

A light-emitting device comprises a first type semiconductor layer, a multi-quantum well structure on the first type semiconductor layer, and a second type semiconductor layer on the multi-quantum well structure, wherein the multi-quantum well structure comprises a first portion near the first type semiconductor layer, a second portion near the second type semiconductor layer, and a strain releasing layer between the first portion and the second portion and comprising a first layer including Indium, a second layer including Aluminum on the first layer, and a third layer including Indium on the second layer, wherein the Indium concentration of the third layer is higher than that of the first layer.

Light emitting device

Two or more molded ellipsoid lenses are formed on a packaged LED die by injecting a glue material into a mold over the LED die and curing the glue material. After curing, the refractive index of the lens in contact with the LED die is greater than the refractive index of the lens not directly contacting the LED die. At least one phosphor material is incorporated into the glue material for at least one of the lenses not directly contacting the LED die. The lens directly contacting the LED die may also include one or more phosphor material. A high refractive index coating may be applied between the LED die and the lens.

Refractive index tuning of wafer level package LEDs

A shadow mask assembly includes a securing assembly configured to hold a substrate that is configured to hold a plurality of dies. The securing assembly includes a number of guide pins and a shadow mask comprising holes for the guide pins, said holes allowing the guide pins freedom of motion in one direction. The securing assembly includes a number of embedded magnets configured to secure the shadow mask to the securing assembly.

Shadow mask assembly

A method includes providing an LED element including a substrate and a gallium nitride (GaN) layer disposed on the substrate. The GaN layer is treated. The treatment includes performing an ion implantation process on the GaN layer. The ion implantation process may provide a roughened surface region of the GaN layer. In an embodiment, the ion implantation process is performed at a temperature of less than approximately 25 degrees Celsius. In a further embodiment, the substrate is at a temperature less than approximately zero degrees Celsius during the ion implantation process.

Light emitting diode and method of fabrication thereof

An optical emitter includes a Light-Emitting Diode (LED) on a package wafer, transparent insulators, and one or more transparent electrical connectors between the LED die and one or more contact pads on the packaging wafer. The transparent insulators are deposited on the package wafer with LED dies attached using a lithography or a screen printing method. The transparent electrical connectors are deposited using physical vapor deposition, chemical vapor deposition, spin coating, spray coating, or screen printing and may be patterned using a lithography process and etching.

Light emitting diode optical emitter with transparent electrical connectors

The present application relates to an opto-electronic device. The opto-electronic device includes an n-cladding layer, a p-cladding layer and a multi-quantum well structure. The multi-quantum well structure is located between the p-cladding layer and the n-cladding layer, and includes a plurality of barrier layers, a plurality of well layers and a barrier tuning layer. The barrier tuning layer is made by doping the barrier layer adjacent to the p-cladding layer with an impurity therein for changing an energy barrier thereof to improve the light extraction efficiency of the opto-electronic device.

Opto-electronic device

Growing community of inventors

Hsinchu, Taiwan

Hsin-Hsien Wu