Powerchip Semiconductor Manufacturing Corporation

Alpha Networks Inc.

Hsin-Hong Chen

Yu-Jen Huang

Jih-Wen Chou

Hwi-Huang Chen

Chia-Hao Chang

Robin Christine Hwang

Po-Hsien Yeh

Chih-Hung Lu

Fu-Hung Hsu

The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.

Semiconductor structure and method of forming the same

A high electron mobility transistor device including a channel layer, a first barrier layer, a gate structure, and a spacer is provided. The first barrier layer is disposed on the channel layer. The gate structure is disposed on the first barrier layer. The gate structure includes a first P-type gallium nitride layer, a second barrier layer, and a second P-type gallium nitride layer. The first P-type gallium nitride layer is disposed on the first barrier layer. The second barrier layer is disposed on the first P-type gallium nitride layer. The second P-type gallium nitride layer is disposed on the second barrier layer. A width of the second P-type gallium nitride layer is smaller than a width of the first P-type gallium nitride layer. The spacer is disposed on a sidewall of the second P-type gallium nitride layer.

High electron mobility transistor device and manufacturing method thereof

A GaN device with Npre-treatment is provided in the present invention, including a GaN substrate, an AlGaN layer covering the GaN substrate, a p-GaN gate on the AlGaN layer, a TiN electrode on the p-GaN gate, a first dielectric layer on the AlGaN layer surrounding the p-GaN gate, wherein a horizontal spacing is between the first dielectric layer and the p-GaN gate, and an interface between the AlGaN layer and the GaN substrate not covered by the first dielectric layer is subject to Npre-treatment, and a second dielectric layer covering on and directly contacting the exposed first dielectric layer, AlGaN layer, p-GaN gate and TiN electrode.

GaN device with N2 pre-treatment and method of performing Npre-treatment

A HEMT device including a substrate structure, a channel layer, a barrier layer, a gate electrode, a drain electrode, a first source field plate, a second source field plate, and a dielectric structure is provided. The first source field plate extends from the second side of the gate electrode to the first side of the gate electrode. The second source field plate is located on the first side of the gate electrode and is located between the drain electrode and the first source field plate. There is a gap between the first source field plate and the second source field plate. The first source field plate has an end adjacent to the gap. The thickness of the dielectric structure located directly below the second source field plate is greater than the thickness of the dielectric structure located directly below the end of the first source field plate.

This disclosure provides a semiconductor structure and a method of forming buried field plate structures. The semiconductor structure includes a substrate, buried field plate structures, and a gate. The substrate incudes a first surface and a second surface opposite the first surface. Each of the buried field plate structures include a conductive structure and an insulation structure surrounding the conductive structure. The gate is embedded in the substrate and extend into the substrate from the first surface of the substrate, wherein the gate is configured between the two neighboring buried field plate structures. The conductive structure includes portions arranging along a direction perpendicular to the first surface of the substrate and having different widths in a direction parallel to the first surface of the substrate.

Semiconductor structure and method of forming buried field plate structures

A heat dissipation structure and an electronic apparatus having the heat dissipation structure are provided. The electronic apparatus includes a printed circuit board, a high thermal-resisting housing, a thermal pad and a metal bracket. Heat is transferred between the thermal pad and an electronic component mounted on the printed circuit board. The high thermal-resisting housing defines an inner space for accommodating the printed circuit board. A columnar space is formed in the high thermal-resisting housing, and a metal layer is arranged outside the columnar space. The thermal conductivity of the high thermal-resisting housing is not greater than 1 W/m&#xb7;K. The metal bracket and the printed circuit board are disposed at two opposite sides of the high thermal-resisting housing, respectively. A fastening member penetrates through the metal bracket and is inserted into the columnar space to urge the metal bracket to be in contact with the metal layer.

Growing community of inventors

Hsinchu, Taiwan

Hsin-Hong Chen