Taiwan Semiconductor Manufacturing Comp. Ltd.

Zih Corporation

Mosaid Technologies Corporation

Belon Engineering, Inc.

Other

National Taiwan University

Asustek Computer Inc.

Hsin-Chih Chen

Kai-Tai Chang

Ming-Feng Shieh

Chang-Yun Chang

Shao-Ming Yu

Clement Hsingjen Wann

Chih-Hsin Ko

Chih-Hao Chang

Yi-Tang Lin

Kuei-Liang Lu

Ru-Gun Liu

Wei-Liang Lin

Shi Ning Ju

Chin-Yuan Tseng

Chih-Ming Lai

Jiann-Tyng Tzeng

Chih-Liang Chen

Wei-Cheng Lin

Charles Chew-Yuen Young

Kam-Tou Sio

Yung-Sung Yen

Chun-Hung Lee

Ching-Feng Fu

Shih-Ting Hung

Lei-Chun Chou

Juan Bautista Belon

Yi-Shan Chen

Randal Wong

Chao-Cheng Chen

Tsung-Lin Lee

Ken-Hsien Hsieh

Feng Yuan

Jiun-Ming Kuo

Petrica Dorinel Balcan

Che-Yuan Hsu

You-Ting Lin

Lawrence Edward Smolenski

Duen-Huei Hou

Jen-Hong Chang

Kuo-Chin Liu

Han-Yu Tsai

Jung Ethan Hoon Lee

Nitish Swarup

Neng-Kuo Chen

Jeff J Xu

Wei-Sheng Yun

Paul D Faucher

Kuan-Ying Lu

Chia-Chi Chung

Richard Alan Kelley

Chih-Hui Weng

David Meyer

Tsu Hao Wang

Lawrence E Smolenski

Petricia Dorinel Balcan

Shu-Hsun Chiang

Ya-Fang Ke

Hsing-Han Tsai

Chia-Wen Chang

Alan C Lin

Yun-Chung Chang

Hsin-Chi Huang

Meng-Wei Chen

Li-Wen Hsu

Ju-I Lee

J H Wang

Paul Daniel Faucher

A method of manufacturing a semiconductor device includes at least the following steps. A protrusion is formed in a substrate by an anisotropic etch process, wherein a sidewall of the protrusion is inclined. A recess is formed on the sidewall of the protrusion by an isotropic etch process, wherein during the isotropic etch process, a by-product covers a first portion of the sidewall of the protrusion while exposing a second portion of the sidewall of the protrusion, so that the recess is formed between the first portion and the second portion of the sidewall.

Manufacturing method of semiconductor device

A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.

Structure and method for providing line end extensions for fin-type active regions

A semiconductor device includes a first semiconductor fin that is formed over a substrate and extends along a first lateral axis. The semiconductor device includes a second semiconductor fin that is also formed over the substrate and extends along the first lateral axis. At least a tip portion of the first semiconductor fin and at least a tip portion of the second semiconductor fin bend toward each other along a second lateral axis that is perpendicular to the first lateral axis.

Fin Field-Effect Transistor and method of forming the same

A semiconductor device includes a semiconductor substrate, at least one semiconductor fin and a gate stack. The semiconductor fin is disposed on the semiconductor substrate. The semiconductor fin includes a first portion, a second portion and a first neck portion between the first portion and the second portion. A width of the first portion decreases as the first portion becomes closer to the first neck portion, and a width of the second portion increases as the second portion becomes closer to a bottom surface of the semiconductor substrate. The gate stack partially covers the semiconductor fin.

Semiconductor device and manufacturing method thereof

Fin field-effect transistor and method of forming the same

A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.

A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.

High-density semiconductor device

Methods are disclosed herein for patterning integrated circuit devices, such as fin-like field effect transistor devices. An exemplary method includes forming a material layer that includes an array of fin features, and performing a fin cut process to remove a subset of the fin features. The fin cut process includes exposing the subset of fin features using a cut pattern and removing the exposed subset of the fin features. The cut pattern partially exposes at least one fin feature of the subset of fin features. In implementations where the fin cut process is a fin cut first process, the material layer is a mandrel layer and the fin features are mandrels. In implementations where the fin cut process is a fin cut last process, the material layer is a substrate (or material layer thereof), and the fin features are fins defined in the substrate (or material layer thereof).

Fin-like field effect transistor patterning methods for increasing process margins

A printer may include a printhead assembly, a clutch assembly, and/or a printer ribbon transport assembly. An example clutch assembly includes a first spool engagement member defining a first friction torque; a first friction member configured to frictionally engage the first spool engagement member; a second spool engagement member defining a second friction torque that is larger than the first fiction torque; and a second friction member configured to frictionally engage the second spool engagement member.

Printer with printhead assembly, clutch assembly, and printer ribbon transport assembly

A method includes forming an isolation feature in a semiconductor substrate; forming a first fin-like active region and a second fin-like active region in the semiconductor substrate and interposed by the isolation feature; forming a dummy gate stack on the isolation feature, wherein the dummy gate extends to the first fin-like active region from one side and to the second fin-like active region from another side.

Structure and method for transistors with line end extension

Growing community of inventors

Tucheng, Taiwan

Hsin-Chih Chen