United Microelectronics Corp.

Hsien-Hung Tsai

Hsin-Wen Chen

Chi-Chang Shuai

Hung-Chan Lin

Ting-Hao Chang

The present invention provides a semiconductor memory circuit, the semiconductor memory circuit includes a static random access memory (SRAM), having a first storage node and a second storage node, a dynamic oxide semiconductor random access memory (DOSRAM), electrically connected to the SRAM, wherein the DOSRAM includes a first oxide semiconductor field effect transistor (OSFET) and a capacitor, wherein a source of the first OSFET is electrically connected to the first storage node, and a drain of the first OSFET is electrically connected to the capacitor, and a second transistor and a third oxide semiconductor field effect transistor (OSFET), wherein a drain of the second transistor is electrically connected to the second storage node, a source of the third OSFET is electrically connected to the capacitor, and a drain of the third OSFET is electrically connected to a gate of the third transistor.

Dynamic oxide semiconductor random access memory(DOSRAM) having a capacitor electrically connected to the random access memory (SRAM)

An array of dynamic random access memory cells includes a first set of memory cell pairs in a first row, a second set of memory cells in a second row, and a first set of bit line contacts in the first row. The second set of memory cell pairs are disposed adjacent to the first set of memory cell pairs, and each two of the memory cell pairs in the second row include a common S/D region. Each of the first set of bit line contacts is electrically coupled to each of the common S/D regions of the memory cell pairs in the second row respectively.

Growing community of inventors

Hsinchu, Taiwan

Hsien-Hung Tsai