Taiwan Semiconductor Manufacturing Comp. Ltd.

Hsien-Chung Huang

Chao-Cheng Chen

Chih-Han Lin

Ming-Ching Chang

Shih-Yao Lin

Kuei-Yu Kao

Chen-Ping Chen

Yu-Chi Lin

Chih-Chung Chiu

Yu-Ting Weng

Chen-Yui Yang

Ke-Chia Tseng

Mei-Ju Kuo

Chiung-Wen Hsu

Ting-Chung Wang

A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.

Etch profile control of isolation trench

A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.

Semiconductor devices including dummy gate dielectric layer and methods of manufacturing thereof

Semiconductor devices and methods of manufacturing thereof

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Hsinchu, Taiwan

Hsien-Chung Huang