Solid State Storage Technology Corporation

Hsiao-Chang Yen

Shih-Jia Zeng

Tsu-Han Lu

Jen-Chien Fu

A solid state storage device using a prediction function is provided. The solid state storage device includes a control circuit and a non-volatile memory. The control circuit generates collection read operation commands. The collection read operation commands are temporarily stored in a command queue, and transmitted to the non-volatile memory. According to each of the collection read operation commands, the non-volatile memory generates a corresponding encoded read data to the control circuit. After the error correction circuit performs a decoding operation on the encoded read data, a decoded content is generated and a first count of the decoded content is transmitted to a first register of the register set. After the encoded read data is decoded, a value stored in the first register is a first parameter and the first parameter is inputted into a prediction function of the function storage circuit.

Solid state storage device using prediction function

A solid state storage device includes a non-volatile memory and a control circuit. The non-volatile memory includes a specified region. The control circuit is connected with the non-volatile memory, and includes a function storage circuit. A state prediction function for a first failure mode and a state prediction function for a second failure mode are stored in the function storage circuit. If the control circuit confirms that the specified region is changed from the first failure mode to the second failure mode, the control circuit predicts the specified region according to current state parameters of the specified region and the state prediction function for the second failure mode.

Solid state storage device using state prediction method

A solid state storage device includes a control circuit and a non-volatile memory. The control circuit includes a retry table. In addition, plural retry read-voltage sets are recorded in the retry table, and the retry table is divided into plural retry sub-tables. The plural retry read-voltage sets are classified into plural groups. The plural retry read-voltage sets are recorded into the corresponding retry sub-tables. The non-volatile memory is connected with the control circuit. During a read retry process of a read cycle, the control circuit performs a hard decoding process according to a retry sub-table of the plural retry sub-tables. If the hard decoding process fails, the control circuit performs a soft decoding process according to another retry sub-table of the plural retry sub-tables.

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Taipei, Taiwan

Hsiao-Chang Yen