Macronix International Co., Ltd.

International Business Machines Corporation

Qimonda North America Corporation

Macronix International

Hsiang Lan Lung

Shih-Hung Chen

Shih Hung Chen

Chieh Fang Chen

Chung H Lam

Thomas Happ

Alejandro Gabriel Schrott

Matthew Joseph Breitwisch

Eric Andrew Joseph

Jan Boris Philipp

ChiaHua Ho

Geoffrey W Burr

Yi-Chou Chen

Chieh-Fang Chen

Yi Chou Chen

Tung Chen Kuo

An integrated circuit with an embedded memory comprises a substrate and a plurality of conductor layers arranged for interconnecting components of the integrated circuit. An intermediate layer in the plurality of conductor layers includes a first electrode having a top surface, a second electrode having a top surface, an insulating member between the first electrode and the second electrode. A bridge overlies the intermediate layer between the first and second electrodes across the insulating member, wherein the bridge comprises a programmable resistive memory material, such as a phase change material. A conductor in at least one layer in the plurality of conductor layers over said intermediate layer is connected to said bridge.

Self-aligned, embedded phase change RAM

A method for manufacturing a mushroom-cell type phase change memory is based upon manufacturing a pillar of bottom electrode material upon a substrate including an array of conductive contacts in electrical communication with access circuitry. A layer of electrode material is deposited making reliable electrical contact with the array of conductive contacts. Electrode material is etched to form a pattern of electrode pillars on corresponding conductive contacts. Next, a dielectric material is deposited over the pattern and planarized to provide an electrode surface exposing top surfaces of the electrode pillars. Next, a layer of programmable resistive material, such as a chalcogenide or other phase change material, is deposited, followed by deposition of a layer of a top electrode material. A device including bottom electrode pillars with larger bottom surfaces than top surfaces is described.

Method for manufacturing a phase change memory device with pillar bottom electrode

A memory device comprising a first electrode having a top side, a second electrode having a top side and an insulating member between the first electrode and the second electrode. The insulating member has a thickness between the first and second electrodes near the top side of the first electrode and the top side of the second electrode extends outwardly from the top sides of the first and second electrodes defining a wall of insulating material having top side. A bridge of memory material crosses the insulating member over the top of the wall, and defines an inter-electrode path between the first and second electrodes across the insulating member. An array of such memory cells is provided. The bridge comprises an active layer of memory material on the top side of the wall, having at least two solid phases and a layer of thermal insulating material overlying the memory material having thermal conductivity less than a thermal conductivity of the first and second electrodes.

Thin film fuse phase change cell with thermal isolation pad and manufacturing method

A memory device. The device includes first and second electrode members, in spaced relation on a substrate. A phase change element lies in electrical contact with the first and second electrode elements and spans the space separating them. The phase change element includes two segments, each in contact with one of the electrode elements. The segments are fused together at a location between the two electrodes such that the fused area has a smaller cross-sectional area than does the remainder of the phase change element. The electrodes, the substrate and the phase change element define a chamber containing a vacuum.

Phase change memory cell with vacuum spacer

A phase change memory cell includes first and second electrodes having generally coplanar surfaces spaced apart by a gap and a phase change bridge electrically coupling the first and second electrodes. The phase change bridge may extend over the generally coplanar surfaces and across the gap. The phase change bridge has a higher transition temperature bridge portion and a lower transition temperature portion. The lower transition temperature portion comprises a phase change region which can be transitioned from generally crystalline to generally amorphous states at a lower temperature than the higher transition temperature portion. A method for making a phase change memory cell is also disclosed.

Phase change memory cell with first and second transition temperature portions

Memory cells are described along with methods for manufacturing. A memory cell described herein includes a bottom electrode, a top electrode overlying the bottom electrode, a via having a sidewall extending from a bottom electrode to a top electrode, and a memory element electrically coupling the bottom electrode to the top electrode. The memory element has an outer surface contacting a dielectric sidewall spacer that is on the sidewall of the via, and comprises a stem portion on the bottom electrode and a cup portion on the stem portion. A fill material is within an interior defined by an inner surface of the cup portion of the memory element.

Phase change memory cell with filled sidewall memory element and method for fabricating the same

A memory device comprising a first pan-shaped electrode having a side wall with a top side, a second pan-shaped electrode having a side wall with a top side and an insulating wall between the first side wall and the second side wall. The insulating wall has a thickness between the first and second side walls near the respective top sides. A bridge of memory material crosses the insulating wall, and defines an inter-electrode path between the first and second electrodes across the insulating wall. An array of such memory cells is provided. The bridges of memory material have sub-lithographic dimensions.

Spacer electrode small pin phase change RAM and manufacturing method

A memory device with improved thermal isolation. The memory cell includes a first electrode element, having an upper surface; an insulator stack formed on the first electrode element, including first, second and third insulating members, all generally planar in form and having a central cavity formed therein and extending therethrough, wherein the second insulator member is recessed from the cavity; a phase change element, generally T-shaped in form, having a base portion extending into the cavity to make contact with the first electrode element and making contact with the first and third insulating members, and a crossbar portion extending over and in contact with the third insulating member, wherein the base portion of the phase change element, the recessed portions of the second insulating member and the surfaces of the first and third insulating members define a thermal isolation void; and a second electrode formed in contact with the phase change member.

Vacuum cell thermal isolation for a phase change memory device

A phase change memory device comprises a photolithographically formed phase change memory cell having first and second electrodes and a phase change element positioned between and electrically coupling the opposed contact elements of the electrodes to one another. The phase change element has a width, a length and a thickness. The length, the thickness and the width are less than a minimum photolithographic feature size of the process used to form the phase change memory cell. The size of the photoresist masks used in forming the memory cell may be reduced so that the length and the width of the phase change element are each less than the minimum photolithographic feature size.

Phase change memory device and manufacturing method

A self-converged memory material element is created during the manufacture of a memory cell comprising a base layer, with a bottom electrode, and an upper layer having a third, planarization stop layer over the base layer, a second layer over the third layer, and the first layer over the second layer. A keyhole opening is formed through the upper layer to expose the bottom electrode. The first layer has an overhanging portion extending into the opening. A dielectric material is deposited into the keyhole opening so to create a self-converged void within the keyhole opening. An anisotropic etch forms a sidewall of the dielectric material in the keyhole opening with an electrode hole aligned with the void and exposing the bottom electrode. A memory material is deposited into the electrode hole in contact with the bottom electrode and is planarized down to the third layer to create the memory material element.

Method for making a self-converged memory material element for memory cell

A memory device having a vacuum jacket around the first electrode element for improved thermal isolation. The memory unit includes a first electrode element; a phase change memory element in contact with the first electrode element; a dielectric fill layer surrounding the phase change memory element and the first electrode element, wherein the dielectric layer is spaced from the first electrode element to define a chamber between the first electrode element and the dielectric fill layer; and wherein the phase change memory layer is sealed to the dielectric fill layer to define a thermal isolation jacket around the first electrode element.

Vacuum jacketed electrode for phase change memory element

A base layer, comprising an electrically conductive element, is formed. An upper layer, including a third, lower planarization stop layer, a second layer and a first, upper layer is formed on the base layer. A keyhole opening is formed through the upper layer to expose a surface of an electrically conductive element in the base layer. The first layer has an overhanging portion extending into the opening so that the opening in the first layer is shorter than in the second layer. A dielectric material is deposited into the keyhole opening to create a self-converged void within the deposited dielectric material. In some examples the keyhole forming step comprises increasing the volume of the first layer while in other examples the keyhole forming step comprises etching back the second layer.

Method for making a self-converged void and bottom electrode for memory cell

A memory device includes two electrodes, vertically separated and having mutually opposed contact surfaces, between which lies a phase change cell. The phase change cell includes an upper phase change member, having a contact surface in electrical contact with the first electrode; a lower phase change member, having a contact surface in electrical contact with the second electrode; and a kernel member disposed between and in electrical contact with the upper and lower phase change members. The phase change cell is formed of material having at least two solid phases, and the lateral extent of the upper and lower phase change members is substantially greater than that of the kernel member. An intermediate insulating layer is disposed between the upper and lower phase change members adjacent to the kernel member.

I-shaped phase change memory cell

A method of forming a memory cell comprises forming a stack comprising a first electrode, an insulating layer over the first electrode, and a second electrode over the insulating layer, with a side wall on the stack. A side wall spacer comprising a programmable resistive material in electrical communication with the first and second electrodes is formed. The side wall spacer is formed by depositing a layer of programmable resistive material over the side wall of the stack, anisotropically etching the layer of programmable resistive material to remove it in areas away from the side wall, and selectively etching the programmable resistive material according to a pattern to define the width of the side wall spacer. In embodiments described herein, the width is about 40 nanometers or less.

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Elmsford, NY, United States of America

Hsiang Lan Lung