Mediatek Corporation

Mediatek Singapore Pte. Ltd.

Mediatek Incorporation

Archic Tech. Corp.

Hsiang-Hui Chang

Hsin-Hung Chen

Chi-Hsueh Wang

Jing-Hong Conan Zhan

Yang-Chuan Chen

Ping-Ying Wang

Bing-Yu Hsieh

Chih-Jung Chen

Chun-Pang Wu

Chieh Hung Chen

Li-Shin Lai

Chih-Hao Sun

Bo-Yu Lin

Khurram Muhammad

Shen-Iuan Liu

Bernard Mark Tenbroek

Yen-Lin Huang

Chih-Chien Huang

George Chien

Yung-Yu Lin

Jong-Woei Chen

Thomas Edward Pare, Jr

Chih-Ming Hung

En-Hsiang Yeh

Caiyi Wang

Bing Xu

Gary Allen Anwyl

Wen-Chieh Wang

Hung-Tao Hsieh

Hsueh-Kun Liao

Chi-Yun Wang

Yangjian Chen

Augusto Marques

Chieh-Hung Chen

Tsung-Ling Li

Dimitris Nalbantis

Chia-Huang Fu

Chien-Hung Kuo

I-Wen Liu

Paul Muller

Tzu-Chien Hsueh

Yen Lin Huang

A method of transmit power control in a mobile telecommunications device is provided. One of a plurality of signal paths providing different output power and different gains is assigned in a first gain adjustment and a first power measurement in a current time slot. The same one of the signal paths is assigned in at least a second gain adjustment and a second power measurement in the same current time slot.

Transmit power control method and system in mobile communications device

A digital signal up-converting apparatus includes: a clock generating circuit arranged to generate a reference clock signal; an adjusting circuit coupled to the clock generating circuit and arranged to generate a first clock signal and a second clock signal according to the reference clock signal; a baseband circuit coupled to the adjusting circuit for receiving the first clock signal, wherein the baseband circuit further generates a digital output signal according to the first clock signal; and a sampling circuit coupled to the adjusting circuit and the baseband circuit for receiving the second clock signal and the digital output signal, wherein the second clock signal and the digital output signal are non-overlapping; wherein the sampling circuit samples the digital output signal based on the second clock signal and then combines the sampled digital output signal in order to generate a combined digital signal.

Digital signal up-converting apparatus and related digital signal up-converting method

A switching power amplifier includes: a first transistor controlled by a first digital signal to selectively output a first output signal; a second transistor controlled by a second digital signal to selectively output a second output signal; and a control circuit arranged to generate the second digital signal according to the first digital signal and a third digital signal; wherein the first output signal and the second output signal are outputted on a common connected node of the first transistor and the second transistor.

Switching power amplifier and method for controlling the switching power amplifier

A transmit power measurement apparatus includes a transmit power detection path, a compensation circuit and a tracking circuit. The compensation circuit includes a programmable filter device and a compensation controller. The programmable filter device generates a filter output. The compensation controller sets the programmable filter device at least based on a frequency response of the transmit power detection path. The tracking circuit generates a transmit power tracking result at least based on the filter output.

Transmit power measurement apparatus having programmable filter device that is set at least based on frequency response of transmit power detection path and related transmit power measurement method thereof

A method operative on a wireless transceiver device for performing beamforming calibration includes: measuring at least one joint signal response of at least one circuit loopback between a transmitter of the wireless transceiver device and a receiver of the wireless transceiver device to determine the measurement result; and calibrating joint signal path mismatch according to the measurement result for s multiple antenna beamforming system operating on the wireless transceiver device.

Scheme for performing beamforming calibration by measuring joint signal path mismatch

A modulation circuit includes a phase locked loop (PLL) circuit, a scalar circuit and a sigma-delta modulator. The PLL circuit is for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal. The scalar circuit is for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form. The sigma-delta modulator is for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.

Modulation circuit and operating method thereof

A data converting device includes: a data sampling circuit arranged to up-sample a digital signal to generate an up-sampling signal according to a clock signal; a voltage level generating circuit arranged to generate an adjustable voltage; and a signal converting circuit arranged to generate a converting signal according to the adjustable voltage and the up-sampling signal.

Data converting device, digital transmitting apparatus using the data converting device, and related data converting method

A transmitter device with I/Q mismatch compensation and a method thereof are provided. The transmitter device includes a transmitter circuit, a loop-back circuit and a baseband circuit. The transmitter circuit is configured to convert a baseband signal into an RF signal based on a specific gain configuration of a plurality of gain configurations. The loop-back circuit is configured to retrieve the RF signal from the transmitter circuit. The baseband circuit is configured to compensate the baseband signal by specific transmitter I/Q mismatch corresponding to the specific gain configuration, wherein a plurality of transmitter IQ mismatches are determined for the plurality of gain configurations by the retrieved RF signal, and the specific transmitter I/Q mismatch among the plurality of transmitter IQ mismatches is determined by the retrieved RF signal, which is converted in response to the specific gain configuration, from the loop-back circuit.

Transmitter devices of I/Q mismatch calibration, and methods thereof

A signal transmitting device includes: a signal processing circuit arranged to process an input signal to generate a processed input signal according to a compensating signal; a signal converting circuit arranged to convert the processed input signal to generate an output signal according to an oscillating signal; and an arithmetic circuit arranged to generate the compensating signal according to the power of a predetermined component in the output signal, wherein the signal processing circuit uses the compensating signal to update the input signal, and the signal converting circuit converts the updated input signal to reduce the power of the predetermined component in the output signal.

Signal transmitting device and signal transmitting method

A communication device with a power detection scheme is disclosed. The communication device includes a transmitter for transmitting an RF signal, a demodulator for demodulating the RF signal by utilizing a phase-modulated (PM) signal provided from the transmitter to generate a demodulated signal, a loopback circuit coupled between the transmitter and the demodulator for transmitting the RF signal and the PM signal from the transmitter to the demodulator when the power detection scheme is enabled, and a power detector for detecting power of the demodulated signal.

Power detection method and related communication device

A transmitter includes a first channel and a second channel. The first channel includes a first mixer, and is used for processing a first input signal to generate a first output signal; the second channel includes a second mixer, where the second channel does not receive any input signal. When the transmitter is operated under a first mode, both the first mixer and the second mixer receive oscillation signals.

Transmitter supporting two modes

A digital transmitter includes: a plurality of adjustable delay lines arranged to delay a plurality of digital input signals by a plurality of delay times to generate a plurality of delayed digital input signals respectively; a plurality of converting devices arranged to convert the plurality of delayed digital input signals into a plurality of converting signals respectively; and a calibration device arranged to adjust a delay time of at least one adjustable delay line in the plurality of adjustable delay lines to make the plurality of converting devices convert the plurality of delayed digital input signals at respective desire time points.

Digital transmitter and method for calibrating digital transmitter

A digital transmitter includes: a plurality of converting devices arranged to generate a plurality of converting signals according to a plurality of digital input signals; a compensation device arranged to generate at least one compensation signal according to the plurality of digital input signals; and a combining circuit arranged to output an amplified output signal according to the plurality of converting signals and the at least one compensation signal.

Digital transmitter and method for compensating mismatch in digital transmitter

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Taipei Hsien, Taiwan

Hsiang-Hui Chang