Novatek Microelectronics Corp.

Hsiang-Chih Chen

Tung-Cheng Hsin

Don-Chen Hsin

Wen-Chi Lin

Li-Wei Chen

Chung-Wen Hung

Jui-Lin Lo

Pao-Yen Lin

Cheng-Wei Sung

A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.

Display Port (DP) sink device having main Phy circuit with plurality of DP connectors and plurality of AUX Phy circuits coupled to subsidiary link circuit

The present invention discloses a frequency synthesizer. The frequency synthesizer includes a delay unit, for receiving a reference signal and delaying the reference signal according to a delay parameter, so as to generate a delay reference signal; a phase-locked loop, for generating an output signal according to the delay reference signal and a feedback frequency dividing signal; a control unit, for generating the delay parameter and a frequency dividing parameter according to a target magnification factor; and a frequency divider, for dividing the frequency of the output signal according to the frequency dividing parameter.

Frequency synthesizer

A low voltage differential signal (LVDS) output stage including a display signal digital circuit, a data parallel-to-serial (P2S) circuit and a transmitting circuit is provided. The display signal digital circuit generates a display signal and a display clock signal synchronous to each other according to a first frequency multiplication clock signal. The data P2S circuit samples the display signal according to a second frequency multiplication clock signal, so as to generate a serial data signal and a serial clock signal. The first frequency multiplication clock signal and the second frequency multiplication clock signal have a relationship of frequency multiplication. The data P2S circuit includes an adjustment structure for adjusting the serial clock signal according to the display clock signal and the second frequency multiplication clock signal, and controlling a transmitting time of the serial data signal transmitted according to a clock of the second frequency multiplication clock signal.

Low voltage differential signal output stage

A display driving apparatus and a method thereof are provided. The apparatus includes a memory unit, a compression and decompression unit, a data selection unit, and a display accelerating unit. The memory unit is coupled to the compression and decompression unit and stores only a compressed frame to save memory space in the apparatus. The data selection unit determines whether an error is caused to a frame through data compression and decompression. When the error is greater than a predetermined value, the display accelerating unit turns off an overdriving process upon the pixels to avoid image distortion. The data selection unit also determines whether the frames are static or dynamic in order to determine whether to turn on the overdriving process.

Display driving apparatus and method thereof

A digital frequency synthesizer and a method thereof are provided. In the digital frequency synthesizer, a plurality of multiphase signals (MPSs) is generated by a phase delay locked loop array, and a transition reference values is generated by a programmable transition value generator. An operation result obtained according to an input signal and an accumulated value is compared with the transition reference values to generate a phase selection control signal. A phase signal is selected among the MPSs according to the phase selection control signal. After that, a sampling control is performed to the selected phase signal to generate a synthetic signal. The digital frequency synthesizer and the method thereof are flexible and are easy to produce tiny analytic phase, thus, not only fine tuning phases is added but also the resolution of the synthetic signal is improved.

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Taipei, Taiwan

Hsiang-Chih Chen