Synopsys, Inc.

Numerical Technologies, Inc.

Hoyong Park

Christophe Pierrat

Yao-Ting Wang

Fang-Cheng Chang

You-Ping Zhang

A semiconductor layout testing and correction system is disclosed. The system combines both rule-based optical proximity correction and model-based optical proximity correction in order to test and correct semiconductor layouts. In a first embodiment, a semiconductor layout is first processed by a rule-based optical proximity correction system and then subsequently processed by a model-based optical proximity correction system. In another embodiment, the system first processes a semiconductor layout with a rule-based optical proximity correction system and then selectively processes difficult features using a model-based optical proximity correction system. In yet another embodiment, the system selectively processes the various features of a semiconductor layout using a rule-based optical proximity correction system or a model-based optical proximity correction system.

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Sunnyvale, CA, United States of America

Hoyong Park